From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE74AC433EF for ; Fri, 24 Jun 2022 00:04:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0ZJAkkUQzC8oPoU/8N+tPzBh5NT/Vp6DaTgkXpoWR9w=; b=XD5rlCXVfYTkba k00HP1WffmEBdvGXhaXbN5YK9E+U33d9SyDhpuWfgu+bHUNrBpDu6qUsVe3UtuLd99Pr0DTrFFuh/ UAtvTB9ayrikvTG/X4A9Ua3sJEmXoJOIElZEMaByDGSCYJZyHQKoajMA3jSwZf03DaTfLGIKSqnpI Iy6J4LMmATs0/+Qn/Q2NPGOgdpu8eJY8qYOceLfk8lo4Qnm8DynTMD3N8ANQE+UnSaSQ9aoMfkN9C v5CMG5TZEoqgfB+ZeNKlwKWJedhPLYkXZeB9ljxlsHiGBEit0FGcgWqKKb56iA4zduwo1vhiwTB3s RE8uyHxi5HOC2MF4+AlQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4WnR-00HAUn-01; Fri, 24 Jun 2022 00:03:37 +0000 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4WnM-00HATy-Rl; Fri, 24 Jun 2022 00:03:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1656029012; x=1687565012; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=V+hXaNzG1xRg90Us21edRjM0CTBX8UcXbRwupTdVLP4=; b=cFYTK54l0Jj3I3KYIToLQgh2MBUdxyveACW4z74SGmzLY78dBMlA2Ces gJhBGQNfJIfQhtwa4d7XWjLXs74/YuMT/+UrtWBoFpycfC/5V1zxgfr3O kAoWJOq5ve7TsbkEfnJFg0bVzs3rz9UDFIU+ImMNbNX9hVSX2mjXQnvSf 0=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 23 Jun 2022 17:03:32 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 17:03:31 -0700 Received: from quicinc.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 23 Jun 2022 17:03:31 -0700 Date: Thu, 23 Jun 2022 17:03:30 -0700 From: Guru Das Srinagesh To: Andy Shevchenko CC: Aidan MacDonald , Mark Brown , Andy Gross , Bjorn Andersson , Srinivas Kandagatla , Banajit Goswami , Greg Kroah-Hartman , "Rafael J. Wysocki" , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , MyungJoo Ham , Michael Walle , Linus Walleij , Bartosz Golaszewski , Thomas Gleixner , Marc Zyngier , Lee Jones , Manivannan Sadhasivam , Cristian Ciocaltea , Chen-Yu Tsai , , , Matti Vaittinen , , , , Jernej Skrabec , Samuel Holland , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , , linux-arm-msm , linux-arm Mailing List , , ALSA Development Mailing List Subject: Re: [PATCH 18/49] mfd: qcom-pm8008: Add broken_mask_unmask irq chip flag Message-ID: <20220624000329.GB21400@quicinc.com> References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> <20220620200644.1961936-19-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220623_170332_965515_3055BA06 X-CRM114-Status: GOOD ( 18.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 21, 2022 at 11:35:09AM +0200, Andy Shevchenko wrote: > On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald > wrote: > > > > The qcom-pm8008 appears to use "1 to enable" convention for > > enabling interrupts, with separate set and clear registers. > > It's relying on masks and unmasks being inverted from their > > It relies > > > intuitive meaning, so it needs the broken_mask_unmask flag. > > How has it worked until now? It is as Aidan rightly pointed out. When I was writing the pm8008 driver, I found that the mask and unmask terminology used in the framework was inverted when it came to the hardware, so I had to make do and swap them. It works because in regmap_irq_sync_unlock(), the same mask is used to update mask_reg and unmask_reg, except that it is inverted for updating the unmask register. So, by just swapping which register gets updated with the plain mask and which one gets updated with the inverted mask, I could use the framework to accomplish the setting and clearing of the correct registers. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel