From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 158BDC433EF for ; Fri, 24 Jun 2022 12:18:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hap2/WZE/GtjE316kCmlobX/+4WTU6uSohdIAyWmUt8=; b=2vW42faBKv2GgG REIfRZ8eTUaU9Y5ltdDFhVYY+8TCFY31xIzNrLAO9WRk2ru5OWiupktV4+llnf3lzNxi268No9rkO 94RzlF3mC2fk/I1exW011RdDVMEI+D/i8Ya2c6GbV9bE2IuKWKNcQaR78dnZbJl3mQMHuAVsxzluI wARmD/+hUGNEjPsopX5f4dxJ34y+0aG3JZ/6YEsmOj+73aAG6LoaCzos14zQTAaUC1NBReQ7nabnO hZKuyRIcRA4Y7JkYBq724m4ES0SdUAoaYtG15dfHLDOsWwuI8G8YgydDxdFrmw0+kExvzlKLAV3mg X5vWf3kg7be8oByz/rGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4iFh-0029OU-Ps; Fri, 24 Jun 2022 12:17:34 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4iCz-0028P2-Ru for linux-arm-kernel@lists.infradead.org; Fri, 24 Jun 2022 12:14:47 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1A2D9B827BC; Fri, 24 Jun 2022 12:14:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D6A8BC34114; Fri, 24 Jun 2022 12:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656072882; bh=xhGH3Wz8p7oTkxs71Kvl5+Ftr3WjejW+fhXwoTAZErg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BnFj/+tI2rN6E50L3pzmFrvZuHP9PsI+ztV78DurHdUYbfUFxDWvGBqF6OLGKKLSW Pkw0GwiRt2sQLZJ544eBZMldJquZtNJiZQNPQpwCc4Ajhj6ILuZ6+nfy6qmDT0VfUO ObNE2FnE23jLEksq/4lygxD+bmMjxqWL9U1L3lLHgCVC6YIjTGui9LXz22g7ta1Fhm PwOcHNoUGKVhhrjdvTU3KqhdWXjJhFd9vGa9vrUx4X4zhmBxAgwzrK/SDAqtAZWPI9 OSejtB2T+KZGGcwTl342x3XZ/qGW9vCJwHrmJtFcQ6po6qdRv/UqOCqbL8NmrAD6mz IkP4NugwXtO9g== Date: Fri, 24 Jun 2022 13:14:35 +0100 From: Will Deacon To: Tanmay Jagdale Cc: mark.rutland@arm.com, robh@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, sgoutham@marvell.com, lcherian@marvell.com, bbhushan2@marvell.com, amitsinght@marvell.com, james.morse@arm.com Subject: Re: [PATCH RESEND] perf/marvell_cn10k: Add MPAM support for TAD PMU Message-ID: <20220624121435.GA18561@willie-the-truck> References: <20220527185647.3138084-1-tanmay@marvell.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220527185647.3138084-1-tanmay@marvell.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_051446_276480_33454A35 X-CRM114-Status: GOOD ( 22.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, May 28, 2022 at 12:26:47AM +0530, Tanmay Jagdale wrote: > The TAD PMU supports following counters that can be filtered by MPAM > partition id. > - (0x1a) tad_alloc_dtg : Allocations to DTG. > - (0x1b) tad_alloc_ltg : Allocations to LTG. > - (0x1c) tad_alloc_any : Total allocations to DTG/LTG. > - (0x1d) tad_hit_dtg : DTG hits. > - (0x1e) tad_hit_ltg : LTG hits. > - (0x1f) tad_hit_any : Hit in LTG/DTG. > - (0x20) tad_tag_rd : Total tag reads. > > Add a new 'partid' attribute of 16-bits to get the partition id > passed from perf tool. This value would be stored in config1 field > of perf_event_attr structure. > > Example: > perf stat -e tad/tad_alloc_any,partid=0x12/ > > - Drop read of TAD_PRF since we don't have to preserve any > bit fields and always write an updated value. > - Update register offsets of TAD_PRF and TAD_PFC. It would be great if you could document some of this under Documentation/admin-guide/perf like many of the other PMU drivers have done. > Signed-off-by: Tanmay Jagdale > --- > drivers/perf/marvell_cn10k_tad_pmu.c | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/perf/marvell_cn10k_tad_pmu.c b/drivers/perf/marvell_cn10k_tad_pmu.c > index 282d3a071a67..f552e6bffcac 100644 > --- a/drivers/perf/marvell_cn10k_tad_pmu.c > +++ b/drivers/perf/marvell_cn10k_tad_pmu.c > @@ -18,10 +18,12 @@ > #include > #include > > -#define TAD_PFC_OFFSET 0x0 > +#define TAD_PFC_OFFSET 0x800 > #define TAD_PFC(counter) (TAD_PFC_OFFSET | (counter << 3)) > -#define TAD_PRF_OFFSET 0x100 > +#define TAD_PRF_OFFSET 0x900 > #define TAD_PRF(counter) (TAD_PRF_OFFSET | (counter << 3)) > +#define TAD_PRF_MATCH_PARTID (1 << 8) > +#define TAD_PRF_PARTID_NS (1 << 10) > #define TAD_PRF_CNTSEL_MASK 0xFF > #define TAD_MAX_COUNTERS 8 > > @@ -86,23 +88,32 @@ static void tad_pmu_event_counter_start(struct perf_event *event, int flags) > struct hw_perf_event *hwc = &event->hw; > u32 event_idx = event->attr.config; > u32 counter_idx = hwc->idx; > + u32 partid_filter = 0; > u64 reg_val; > + u32 partid; > int i; > > hwc->state = 0; > > + /* Extract the partid (if any) passed by user */ > + partid = event->attr.config1 & 0x3f; [...] > PMU_FORMAT_ATTR(event, "config:0-7"); > +PMU_FORMAT_ATTR(partid, "config1:0-15"); This doesn't seem to match the mask used above? Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel