From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00D75C433EF for ; Fri, 24 Jun 2022 15:08:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fSchFtjf4oLDDYE+j+vAwyQk80vwP0er4Pphd9TcQ9w=; b=NHBjwpV+4e+Ylm 2ayiXWvn+4PDX69F4MVZyyreZUbw1nB9JGRyA1xUpeL/OC9W3jDQQmtOwL0DXg/aaaa9n40iwwOBc OvpcZgWQYH+DGmPpu3OyUnvwm393QnTRoyUEXcAZBK3injHmKgFIOZJ97orqtNhOPHA5QTwHBnkac DfH7LiIlQ9T1M6Z0gghjxIyXwpAH0BR9UV3hKbg1zIX/7IoXSUwTpOGPtuqUJp4eiYNUTfWnLHGYw LM/9fTErrcBw89zerk0rTbaU4GCN7voG2LN3cdfNPMty+zLbtcmnaTtu6ryDHJBgWHDC+8TpCjsOR dpeGRltnLc4gCHG9SrDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4kuK-002iSl-VL; Fri, 24 Jun 2022 15:07:41 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4ktx-002iLA-D8 for linux-arm-kernel@lists.infradead.org; Fri, 24 Jun 2022 15:07:19 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F288962183; Fri, 24 Jun 2022 15:07:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85BC5C36AE2; Fri, 24 Jun 2022 15:07:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656083236; bh=tMQKwsx3kgYRPwIWWp9SOEYVqf/uSzFPsgbG2y0wW+U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XnCSnL1WdYUJINW3sSXrvnlyX6uf2OPtX1Li7jSFfbORpM8u2KzeVaYaMKNYNCQMJ F0XN0eHPR3yEdD7LJoVjt7T+lg1LFU1xh0MUbnbgNysacu+KwQESyFsisPkkutYQo2 V5cxG2sT2ipmU+r3boJAo0hudYbQkBI0E/nwPBWJeL51Q3FtxUcL8jA9Ju6E6ItBEF Gre5rkU8n4Lu6cVfezUix8cE/9oelji3PQCvKrENlempL5pBnMWyLNL782xp2dh+sv QXu8ShN/nLt7GTImrTibG3ubFKml/JSAYcTXS0TMb9JFWOiz1ZI9a3TBOG6BNzBTgG 2b770B1iRqN1g== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Marc Zyngier , Will Deacon , Mark Rutland , Kees Cook , Catalin Marinas , Mark Brown , Anshuman Khandual Subject: [PATCH v5 03/21] arm64: head: move assignment of idmap_t0sz to C code Date: Fri, 24 Jun 2022 17:06:33 +0200 Message-Id: <20220624150651.1358849-4-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220624150651.1358849-1-ardb@kernel.org> References: <20220624150651.1358849-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4313; h=from:subject; bh=tMQKwsx3kgYRPwIWWp9SOEYVqf/uSzFPsgbG2y0wW+U=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBitdLr1Izzi5+OlwgHRthAOZTuLISNk4KFDVt0eBJ9 FVeOadiJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYrXS6wAKCRDDTyI5ktmPJGtEDA CHuGMsHNIb8LMYF3Y1JoTOuobEJ/dXcC1zE3bKXXJpt+ylHek78zNHgVk+srC5h8w6fTy0VpcBvxbi u0mbG0vB/UDyS8HXataIxTdu67HBzztEHckNhoe0Aea8RW2dFgnxEq+0svbELW+dMbqiWwW9chXjXz Rot3Bc63Ew5w6mVUMTIcZSdfeLLnideRnMwQKJpgW7LNC4YTBBedW8paZc+wEsoKzXVXSXpiMSOgk6 ZI6ZSPr0Wyzfaw0KL7gL4yXjt6hv2gB7ZnA4vDRzzGfOxoAobxZdkSlEHolt9RHaBFxNj250f4mOQk wW3KMK6UG+8C1bHk/wumvoYJMDBE7zmNBs7pAWdtr1RxuDD8PvgmGztHo03Ui2EjS1Sxv9zCkU1RXI 8suN2bvivNDUHr2FBUI9hnibRts+JSulgJPoN+ioCSXvhmKGgNXnnttCZostW53rm45VTjjrIviJCk xomuhr1tD+uGZyYQJ/vAaI24qjx6tkbS4X0velTXHms0A= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_080717_563953_E6C0A9B0 X-CRM114-Status: GOOD ( 18.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Setting idmap_t0sz involves fiddling with the caches if done with the MMU off. Since we will be creating an initial ID map with the MMU and caches off, and the permanent ID map with the MMU and caches on, let's move this assignment of idmap_t0sz out of the startup code, and replace it with a macro that simply issues the three instructions needed to calculate the value wherever it is needed before the MMU is turned on. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 14 ++++++++++++++ arch/arm64/include/asm/mmu_context.h | 2 +- arch/arm64/kernel/head.S | 13 +------------ arch/arm64/mm/mmu.c | 4 +++- arch/arm64/mm/proc.S | 2 +- 5 files changed, 20 insertions(+), 15 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 8c5a61aeaf8e..9468f45c07a6 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -359,6 +359,20 @@ alternative_cb_end bfi \valreg, \t1sz, #TCR_T1SZ_OFFSET, #TCR_TxSZ_WIDTH .endm +/* + * idmap_get_t0sz - get the T0SZ value needed to cover the ID map + * + * Calculate the maximum allowed value for TCR_EL1.T0SZ so that the + * entire ID map region can be mapped. As T0SZ == (64 - #bits used), + * this number conveniently equals the number of leading zeroes in + * the physical address of _end. + */ + .macro idmap_get_t0sz, reg + adrp \reg, _end + orr \reg, \reg, #(1 << VA_BITS_MIN) - 1 + clz \reg, \reg + .endm + /* * tcr_compute_pa_size - set TCR.(I)PS to the highest supported * ID_AA64MMFR0_EL1.PARange value diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 6770667b34a3..6ac0086ebb1a 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -60,7 +60,7 @@ static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm) * TCR_T0SZ(VA_BITS), unless system RAM is positioned very high in * physical memory, in which case it will be smaller. */ -extern u64 idmap_t0sz; +extern int idmap_t0sz; extern u64 idmap_ptrs_per_pgd; /* diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index dc07858eb673..7f361bc72d12 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -299,22 +299,11 @@ SYM_FUNC_START_LOCAL(__create_page_tables) * physical address space. So for the ID map, use an extended virtual * range in that case, and configure an additional translation level * if needed. - * - * Calculate the maximum allowed value for TCR_EL1.T0SZ so that the - * entire ID map region can be mapped. As T0SZ == (64 - #bits used), - * this number conveniently equals the number of leading zeroes in - * the physical address of __idmap_text_end. */ - adrp x5, __idmap_text_end - clz x5, x5 + idmap_get_t0sz x5 cmp x5, TCR_T0SZ(VA_BITS_MIN) // default T0SZ small enough? b.ge 1f // .. then skip VA range extension - adr_l x6, idmap_t0sz - str x5, [x6] - dmb sy - dc ivac, x6 // Invalidate potentially stale cache line - #if (VA_BITS < 48) #define EXTRA_SHIFT (PGDIR_SHIFT + PAGE_SHIFT - 3) #define EXTRA_PTRS (1 << (PHYS_MASK_SHIFT - EXTRA_SHIFT)) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index a6392656d589..f875c4954e22 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -43,7 +43,7 @@ #define NO_CONT_MAPPINGS BIT(1) #define NO_EXEC_MAPPINGS BIT(2) /* assumes FEAT_HPDS is not used */ -u64 idmap_t0sz = TCR_T0SZ(VA_BITS_MIN); +int idmap_t0sz __ro_after_init; u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; #if VA_BITS > 48 @@ -774,6 +774,8 @@ void __init paging_init(void) { pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir)); + idmap_t0sz = 63UL - __fls(__pa_symbol(_end) | GENMASK(VA_BITS_MIN - 1, 0)); + map_kernel(pgdp); map_mem(pgdp); diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 972ce8d7f2c5..97cd67697212 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -470,7 +470,7 @@ SYM_FUNC_START(__cpu_setup) add x9, x9, #64 tcr_set_t1sz tcr, x9 #else - ldr_l x9, idmap_t0sz + idmap_get_t0sz x9 #endif tcr_set_t0sz tcr, x9 -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel