From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47BC7C433EF for ; Mon, 27 Jun 2022 11:14:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=B3aN0jRkJ5CSEj7aT1BIs6l5NeLnhVbljR5PQN7V9fQ=; b=AT2vrZtRxpGkjM VYLLm19z03tYa8QsSYDkwzdFMabE9Ly0Q3T4HiMlnZSDKb+E63EAMHcydOm21V0CskUUNQEHNmDhE 2dA+W3L9EtYYAT1+SgU9Mlo/5I8551dFvMsgX9W6K8ePY95xJS9LL/nbPrXZFQcDiYJRLsGvpN9ul qIReka1a8b7TN27wX4qkyM2PghSXXXRfdROuizS4GBRtOXSU0kQcuVI8s13PkYga8VQ+1seOEN+8V ZyRxsEzp4jXHUOtTbCR/+Jwdc/wdz+vHaPLsyoulkgizpbXQDf/aXjYD6x2d6GEGnY/9keKExaMct IZLZg5r98f7EXnBLLi2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5mgP-000Pzw-7H; Mon, 27 Jun 2022 11:13:33 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5mgK-000Py8-Ub for linux-arm-kernel@lists.infradead.org; Mon, 27 Jun 2022 11:13:30 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 688B0B80DF4; Mon, 27 Jun 2022 11:13:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A9029C3411D; Mon, 27 Jun 2022 11:13:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656328406; bh=kOe+ZhcP11eWXLacwrvNesOjOwoae4Ak+vHOGPJnpKM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TaODXz6BN4LkVrRa8wExQyp5zNoEFfl3QDgKn5M3Nr0x3L1Drpd0bL4k7yEUg4lOC vYff69Bch/L3eoNq6QkkwejWtzwwSMdw4YBvhHuQEsSdE/df65qU/VNMTRQ6G3uYa5 ZoPn9rYu1BFkn30cUGLIDmGaUHAad/9YwjerBMdUGx7Oo86BV4cUEG1xhsxflkxRGp 3tC5TlZ6aox3tRC/dg4Bp/KAriqisOMRiqeLi7tEzDD+SAOfI6qs0aESyltJC4Qe0J arl+qLhch9LfOZ+RdsnV5bw+buvayB3dNCUoJIWiiUsFzDet6/Z92sNRaKSybiI94w IR2yJf41Y6BKw== Date: Mon, 27 Jun 2022 12:13:20 +0100 From: Will Deacon To: James Clark Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, broonie@kernel.org, acme@kernel.org, german.gomez@arm.com, leo.yan@linaro.org, mathieu.poirier@linaro.org, john.garry@huawei.com, Catalin Marinas , Jonathan Corbet , Mark Rutland , linux-doc@vger.kernel.org Subject: Re: [PATCH v2 1/2] perf: arm64: Add SVE vector granule register to user regs Message-ID: <20220627111319.GG22095@willie-the-truck> References: <20220517100743.3020667-1-james.clark@arm.com> <20220517100743.3020667-2-james.clark@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220517100743.3020667-2-james.clark@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_041329_297737_F79D76D8 X-CRM114-Status: GOOD ( 32.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 17, 2022 at 11:07:42AM +0100, James Clark wrote: > Dwarf based unwinding in a function that pushes SVE registers onto > the stack requires the unwinder to know the length of the SVE register > to calculate the stack offsets correctly. This was added to the Arm > specific Dwarf spec as the VG pseudo register[1]. > > Add the vector length at position 46 if it's requested by userspace and > SVE is supported. If it's not supported then fail to open the event. > > The vector length must be on each sample because it can be changed > at runtime via a prctl or ptrace call. Also by adding it as a register > rather than a separate attribute, minimal changes will be required in an > unwinder that already indexes into the register list. > > [1]: https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst > > Reviewed-by: Mark Brown > Signed-off-by: James Clark > --- > arch/arm64/include/uapi/asm/perf_regs.h | 7 +++++- > arch/arm64/kernel/perf_regs.c | 30 +++++++++++++++++++++++-- > drivers/perf/arm_pmu.c | 2 +- > 3 files changed, 35 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/include/uapi/asm/perf_regs.h b/arch/arm64/include/uapi/asm/perf_regs.h > index d54daafa89e3..fd157f46727e 100644 > --- a/arch/arm64/include/uapi/asm/perf_regs.h > +++ b/arch/arm64/include/uapi/asm/perf_regs.h > @@ -36,6 +36,11 @@ enum perf_event_arm_regs { > PERF_REG_ARM64_LR, > PERF_REG_ARM64_SP, > PERF_REG_ARM64_PC, > - PERF_REG_ARM64_MAX, > + > + /* Extended/pseudo registers */ > + PERF_REG_ARM64_VG = 46, // SVE Vector Granule > + > + PERF_REG_ARM64_MAX = PERF_REG_ARM64_PC + 1, > + PERF_REG_ARM64_EXTENDED_MAX = PERF_REG_ARM64_VG + 1 I think you can leave PERF_REG_ARM64_MAX alone and just add: PERF_REG_ARM64_VG = 46, PERF_REG_ARM64_EXTENDED_MAX, no? > }; > #endif /* _ASM_ARM64_PERF_REGS_H */ > diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c > index f6f58e6265df..b4eece3eb17d 100644 > --- a/arch/arm64/kernel/perf_regs.c > +++ b/arch/arm64/kernel/perf_regs.c > @@ -9,9 +9,27 @@ > #include > #include > > +static u64 perf_ext_regs_value(int idx) > +{ > + switch (idx) { > + case PERF_REG_ARM64_VG: > + if (WARN_ON_ONCE(!system_supports_sve())) > + return 0; > + > + /* > + * Vector granule is current length in bits of SVE registers > + * divided by 64. > + */ > + return (task_get_sve_vl(current) * 8) / 64; Is 'current' the right thing to use here? We pass the regs everywhere else, so I'd prefer to stick with that if possible. > + default: > + WARN_ON_ONCE(true); > + return 0; > + } > +} > + > u64 perf_reg_value(struct pt_regs *regs, int idx) > { > - if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_MAX)) > + if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_EXTENDED_MAX)) > return 0; > > /* > @@ -51,6 +69,9 @@ u64 perf_reg_value(struct pt_regs *regs, int idx) > if ((u32)idx == PERF_REG_ARM64_PC) > return regs->pc; > > + if ((u32)idx >= PERF_REG_ARM64_MAX) > + return perf_ext_regs_value(idx); > + > return regs->regs[idx]; > } > > @@ -58,7 +79,12 @@ u64 perf_reg_value(struct pt_regs *regs, int idx) > > int perf_reg_validate(u64 mask) > { > - if (!mask || mask & REG_RESERVED) > + u64 reserved_mask = REG_RESERVED; > + > + if (system_supports_sve()) > + reserved_mask &= ~(1ULL << PERF_REG_ARM64_VG); > + > + if (!mask || mask & reserved_mask) > return -EINVAL; > > return 0; > diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c > index 59d3980b8ca2..3f07df5a7e95 100644 > --- a/drivers/perf/arm_pmu.c > +++ b/drivers/perf/arm_pmu.c > @@ -894,7 +894,7 @@ static struct arm_pmu *__armpmu_alloc(gfp_t flags) > * pmu::filter_match callback and pmu::event_init group > * validation). > */ > - .capabilities = PERF_PMU_CAP_HETEROGENEOUS_CPUS, > + .capabilities = PERF_PMU_CAP_HETEROGENEOUS_CPUS | PERF_PMU_CAP_EXTENDED_REGS, How does userspace know this capability is available? Should we advertise the set of extended registers that we support, rather than make this a one-trick pony for the vector length? Also, you don't appear to #define PERF_REG_EXTENDED_MASK so I don't understand how userspace is supposed to interact with this. Won't has_extended_regs() always return false? Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel