From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: "Ard Biesheuvel" <ardb@kernel.org>,
"Will Deacon" <will@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Pierre-Clément Tosi" <ptosi@google.com>,
"Quentin Perret" <qperret@google.com>,
"Mark Rutland" <mark.rutland@arm.com>
Subject: [PATCH 6/6] arm64: efi/libstub: enter with the MMU on if executing in place
Date: Thu, 30 Jun 2022 16:42:30 +0200 [thread overview]
Message-ID: <20220630144230.2332555-7-ardb@kernel.org> (raw)
In-Reply-To: <20220630144230.2332555-1-ardb@kernel.org>
If the kernel image has not been moved from the place where it was
loaded by the firmware, just call the kernel entrypoint directly, and
keep the MMU and caches enabled. This removes the need for any cache
invalidation in the entry path.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/kernel/efi-entry.S | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 61a87fa1c305..0da0b373cf32 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -23,6 +23,10 @@ SYM_CODE_START(efi_enter_kernel)
add x19, x0, x2 // relocated Image entrypoint
mov x20, x1 // DTB address
+ adrp x3, _text // just call the entrypoint
+ cmp x0, x3 // directly if the image was
+ b.eq 2f // not moved around in memory
+
/*
* Clean the copied Image to the PoC, and ensure it is not shadowed by
* stale icache entries from before relocation.
--
2.35.1
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prev parent reply other threads:[~2022-06-30 14:45 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-30 14:42 [PATCH 0/6] arm64: efi: boot with MMU and caches on if possible Ard Biesheuvel
2022-06-30 14:42 ` [PATCH 1/6] arm64: lds: reduce effective minimum image alignment to 64k Ard Biesheuvel
2022-06-30 14:42 ` [PATCH 2/6] arm64: kernel: move ID map out of .text mapping Ard Biesheuvel
2022-06-30 14:42 ` [PATCH 3/6] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-06-30 14:42 ` [PATCH 4/6] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-06-30 14:42 ` [PATCH 5/6] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-06-30 14:42 ` Ard Biesheuvel [this message]
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