From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D159C433EF for ; Fri, 8 Jul 2022 08:28:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ca/Q4JAytMiDex78sdA5t1mCvJC8nYeJijPQS5gyc4Q=; b=FFimoVuOhsVaZa eT2+Es8AjrT0unbvoOCDE4y/3l0H3aQwXYy2CPDyJngZj8H9URf0zRlunCxQytg7kHa1oVD2tWHbc Vsg2fC6rvngtVwJLStiTaH0KvjQ2E8Nyooiz1JQAcbeo2y8TcSIDNDIV9baII+zvd1ByuFtEWxGD4 ldC0U+neBJ7cWGg79KLgCY6S36bpuL048IUaXtc2xD6qkrK/1sEuMSb8HaXGBavC7fvTiHW+PlqOL joPoEwH3USTWBm984bQl+/0dZtNFbwQFI2HhtH/tf30kj8msOHtzq6FWQPXVC0i6gB6fVwoHRPYWS HLPHVqejqTiKVMjbG/TQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9jKX-002X4X-Fj; Fri, 08 Jul 2022 08:27:18 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9jJK-002Wa3-BQ; Fri, 08 Jul 2022 08:26:04 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6E21E1063; Fri, 8 Jul 2022 01:26:00 -0700 (PDT) Received: from bogus (unknown [10.57.39.193]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A11A53F792; Fri, 8 Jul 2022 01:25:54 -0700 (PDT) Date: Fri, 8 Jul 2022 09:24:43 +0100 From: Sudeep Holla To: Conor Dooley Cc: Paul Walmsley , Palmer Dabbelt , Palmer Dabbelt , Albert Ou , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J . Wysocki" , Daire McNamara , Conor Dooley , Niklas Cassel , Damien Le Moal , Geert Uytterhoeven , Zong Li , Emil Renner Berthing , Jonas Hahnfeld , Guo Ren , Anup Patel , Atish Patra , Changbin Du , Heiko Stuebner , Philipp Tomsich , Rob Herring , Marc Zyngier , Viresh Kumar , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brice Goglin Subject: Re: [RFC 2/4] arch-topology: add a default implementation of store_cpu_topology() Message-ID: <20220708082443.azoqvuj7afrg7ox7@bogus> References: <20220707220436.4105443-1-mail@conchuod.ie> <20220707220436.4105443-3-mail@conchuod.ie> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220707220436.4105443-3-mail@conchuod.ie> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220708_012602_475866_909A9C7C X-CRM114-Status: GOOD ( 14.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 07, 2022 at 11:04:35PM +0100, Conor Dooley wrote: > From: Conor Dooley > > RISC-V & arm64 both use an almost identical method of filling in > default vales for arch topology. Create a weakly defined default > implementation with the intent of migrating both archs to use it. > > Signed-off-by: Conor Dooley > --- > drivers/base/arch_topology.c | 19 +++++++++++++++++++ > include/linux/arch_topology.h | 1 + > 2 files changed, 20 insertions(+) > > diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c > index 441e14ac33a4..07e84c6ac5c2 100644 > --- a/drivers/base/arch_topology.c > +++ b/drivers/base/arch_topology.c > @@ -765,6 +765,25 @@ void update_siblings_masks(unsigned int cpuid) > } > } > > +void __weak store_cpu_topology(unsigned int cpuid) I prefer to have this as default implementation. So just get the risc-v one pushed to upstream first(for v5.20) and get all the backports if required. Next cycle(i.e. v5.21), you can move both RISC-V and arm64. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel