From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFA14C433EF for ; Tue, 19 Jul 2022 18:14:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rLKm6seMhBq2eiTk/77CCtCrtv5TP+axK5pSab6GUNc=; b=Lo3d/BbLEP4rhp NBRQmBbW7SY1TnyirHC5ikCnD7coW/Nie4WlrlKSBSngbJJdZ99FPDXCXOi3aVcrFKCWV8nmLGeqB UsMZy8yh51sMe5qPEwGMQ0bC2yquZI2eP19kyJwRFMfd+MCFLmWgekal4CCNWYnTeYiEg2r3xrwCi igwMcqTXKutyldxhM3MdJ/tPplVlOZ666SCvqS8Uw36L5FzmuAV12M3pwS1aWhk73Ugnp67//wOg6 G+ZQx4gmkFcGwcPuGKAAu2aL8jg5VDMlRmLThlTHqp9xfbVYM6bp04hKeWb7HyL/N4mr/QvRcyYjQ M4yqrdAN3rYWAgASKfBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oDrjD-00B9PE-S7; Tue, 19 Jul 2022 18:13:51 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oDrjB-00B9LY-8B for linux-arm-kernel@lists.infradead.org; Tue, 19 Jul 2022 18:13:50 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A29316173B; Tue, 19 Jul 2022 18:13:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DC2A6C341C6; Tue, 19 Jul 2022 18:13:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1658254425; bh=iZwXTyMNpEQ50zZbh05mNc14Gm/f4Z9Rfi+qabFvA1c=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=rDAtr2M2cuN2AdEV/FpoFht7BEurJGXY0+zVgHwFRwGe8PEQ0QFlpwr8/J64Y32Cx pGg8vvHiatg+JbJ+niUyUy/mFeuba0hXxxKfPaaKIflKDFuDVIYrjS01AkzIoNQNDM Eo/BpAJJDT1TgMSOIdLoQsJ75wLKNIkaJn8OsBfpnYE7cNrGzjo5Pdk8F8fSo0ygAQ YZ+6KjRU8ZwjcBDtxs1Tkq/3PXNx9OWOHyuie4PeOEeqn8eiKWD24jnYYVCaau36Pi 47cl/iY9hFYoB19vd4e+WEtgyG7TZLYLxiEv78UzqFeQ8DOV+Bg+/KG+J1dim8KQh5 fOU5YutpUA7Mw== Date: Tue, 19 Jul 2022 19:13:41 +0100 From: Will Deacon To: Jisheng Zhang Cc: Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: save movk instructions in mov_q when the lower 16|32 bits are all zero Message-ID: <20220719181340.GC14526@willie-the-truck> References: <20220709084830.3124-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220709084830.3124-1-jszhang@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220719_111349_353667_33A160F6 X-CRM114-Status: GOOD ( 20.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Jul 09, 2022 at 04:48:30PM +0800, Jisheng Zhang wrote: > Currently mov_q is used to move a constant into a 64-bit register, > when the lower 16 or 32bits of the constant are all zero, the mov_q > emits one or two useless movk instructions. If the mov_q macro is used > in hot code path, we want to save the movk instructions as much as > possible. For example, when CONFIG_ARM64_MTE is 'Y' and > CONFIG_KASAN_HW_TAGS is 'N', the following code in __cpu_setup() > routine is the pontential optimization target: > > /* set the TCR_EL1 bits */ > mov_q x10, TCR_MTE_FLAGS > > Before the patch: > mov x10, #0x10000000000000 > movk x10, #0x40, lsl #32 > movk x10, #0x0, lsl #16 > movk x10, #0x0 > > After the patch: > mov x10, #0x10000000000000 > movk x10, #0x40, lsl #32 > > Signed-off-by: Jisheng Zhang > --- > arch/arm64/include/asm/assembler.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h > index 8c5a61aeaf8e..09f408424cae 100644 > --- a/arch/arm64/include/asm/assembler.h > +++ b/arch/arm64/include/asm/assembler.h > @@ -568,9 +568,13 @@ alternative_endif > movz \reg, :abs_g3:\val > movk \reg, :abs_g2_nc:\val > .endif > + .if ((((\val) >> 16) & 0xffff) != 0) > movk \reg, :abs_g1_nc:\val > .endif > + .endif > + .if (((\val) & 0xffff) != 0) > movk \reg, :abs_g0_nc:\val > + .endif Please provide some numbers showing that this is worthwhile. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel