From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2BC70C25B08 for ; Fri, 5 Aug 2022 13:59:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nwZYqgcWpE0jNn7thj2zxTX6YCwxJYjaX1B23LoIGXM=; b=MsDU/XXw3HGZmO +ygNSSr1atD0QCgPNp5omY2KAUkjEi+32/NA6AUWJKz5kECsCEwVvkKv8D0J8d4IcRCZ87WsBYHsm z+XGqJWNqckQQO19562OIrefVjjrGL20H1wVWm4Xle6Co3JQJzPePrf94dNUeduN1GdxQtftpVNGD hm1oBqMNghYrsIfBL86NnJ2vjTaCtHxRtWB4aHkWD7DLdt8yjj9As+G+JqyXsr70KumkDesz0cgXX CKC7EuHSAr7M/aOi5ULR/T+SBf5JfNqHCpNedxBqp6YUMhhM9x9gQLLmg8glWYzfQm3cDqofAf0r/ AT8ohWrX9nBk6SXYYuIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJxqO-00FcWY-Aa; Fri, 05 Aug 2022 13:58:28 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJxqJ-00FcSI-3x for linux-arm-kernel@lists.infradead.org; Fri, 05 Aug 2022 13:58:25 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B677260CF3; Fri, 5 Aug 2022 13:58:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 875ACC433D7; Fri, 5 Aug 2022 13:58:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659707901; bh=p/KgIJgXT4aiUUsO7J7PNMFAD/KKFxDIkGl2LFuMnT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aJ4wEfd3GIG7nOXQBHMHobN3jO/LmboU3vmtXnc1tOIEN/fYZ2vMzJDRWD2nq7kXk JH6TT0i/A3F9tyQbX/65mJxS5Zhk9GD6W86KIkgo9kMWFPJk6Vo9zMrT7aU+wP5XGT UzhuLVh7r2VeWYJEQC0pbWIucMULB4ezes3lQQXxGzYBvwOs6jDyJfD4IqQb/8eA/B 89ZsM5ekOIxlr849rGzloXqBk2db/lOUgswK2amR8Kt8yzWWA/klUDmDYUlyoFqgoq ob1uz/33UQ+TrQBeLxbsF1P4kNFLcLCELW9OTgia7S8gehD9p8vskgiVwkzJyLwb5K qg6DnZkOIru9g== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oJxqF-001AeL-Lr; Fri, 05 Aug 2022 14:58:19 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: James Morse , Suzuki K Poulose , Alexandru Elisei , Oliver Upton , Ricardo Koller , kernel-team@android.com Subject: [PATCH 2/9] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Date: Fri, 5 Aug 2022 14:58:06 +0100 Message-Id: <20220805135813.2102034-3-maz@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220805135813.2102034-1-maz@kernel.org> References: <20220805135813.2102034-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, oliver.upton@linux.dev, ricarkol@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220805_065823_262240_B38C5BA1 X-CRM114-Status: GOOD ( 15.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PMU architecture makes a subtle difference between a 64bit counter and a counter that has a 64bit overflow. This is for example the case of the cycle counter, which can generate an overflow on a 32bit boundary if PMCR_EL0.LC==0 despite the accumulation being done on 64 bits. Use this distinction in the few cases where it matters in the code, as we will reuse this with PMUv3p5 long counters. Signed-off-by: Marc Zyngier --- arch/arm64/kvm/pmu-emul.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index 4986e8b3ea6c..9040d3c80096 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -48,6 +48,11 @@ static u32 kvm_pmu_event_mask(struct kvm *kvm) * @select_idx: The counter index */ static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx) +{ + return (select_idx == ARMV8_PMU_CYCLE_IDX); +} + +static bool kvm_pmu_idx_has_64bit_overflow(struct kvm_vcpu *vcpu, u64 select_idx) { return (select_idx == ARMV8_PMU_CYCLE_IDX && __vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC); @@ -55,7 +60,8 @@ static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx) static bool kvm_pmu_counter_can_chain(struct kvm_vcpu *vcpu, u64 idx) { - return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX); + return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX && + !kvm_pmu_idx_has_64bit_overflow(vcpu, idx)); } static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc) @@ -95,7 +101,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx) counter += perf_event_read_value(pmc->perf_event, &enabled, &running); - if (select_idx != ARMV8_PMU_CYCLE_IDX) + if (!kvm_pmu_idx_is_64bit(vcpu, select_idx)) counter = lower_32_bits(counter); return counter; @@ -447,7 +453,7 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event, */ period = -(local64_read(&perf_event->count)); - if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx)) + if (!kvm_pmu_idx_has_64bit_overflow(vcpu, pmc->idx)) period &= GENMASK(31, 0); local64_set(&perf_event->hw.period_left, 0); @@ -577,7 +583,7 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) counter = kvm_pmu_get_counter_value(vcpu, select_idx); /* The initial sample period (overflow count) of an event. */ - if (kvm_pmu_idx_is_64bit(vcpu, select_idx)) + if (kvm_pmu_idx_has_64bit_overflow(vcpu, select_idx)) attr.sample_period = (-counter) & GENMASK(63, 0); else attr.sample_period = (-counter) & GENMASK(31, 0); -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel