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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 11/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange
Date: Thu, 18 Aug 2022 13:24:08 +0100	[thread overview]
Message-ID: <20220818122425.37889-12-broonie@kernel.org> (raw)
In-Reply-To: <20220818122425.37889-1-broonie@kernel.org>

The kernel refers to ID_AA64MMFR2_EL1.VARange as LVA. In preparation for
automatic generation of defines for the system registers bring the naming
used by the kernel in sync with that of DDI0487H.a. No functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 2 +-
 arch/arm64/kernel/cpufeature.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 948a63221434..54f8fc398f90 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -815,7 +815,7 @@
 #define ID_AA64MMFR2_EL1_ST_SHIFT	28
 #define ID_AA64MMFR2_EL1_NV_SHIFT	24
 #define ID_AA64MMFR2_EL1_CCIDX_SHIFT	20
-#define ID_AA64MMFR2_EL1_LVA_SHIFT	16
+#define ID_AA64MMFR2_EL1_VARange_SHIFT	16
 #define ID_AA64MMFR2_EL1_IESB_SHIFT	12
 #define ID_AA64MMFR2_EL1_LSM_SHIFT	8
 #define ID_AA64MMFR2_EL1_UAO_SHIFT	4
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 3f5bc48234fa..0ce0d9bbdc33 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -388,7 +388,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = {
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_ST_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_NV_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_CCIDX_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_LVA_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_VARange_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_IESB_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_LSM_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_EL1_UAO_SHIFT, 4, 0),
-- 
2.30.2


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  parent reply	other threads:[~2022-08-18 12:35 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 12:23 [PATCH v4 00/28] arm64/sysreg: More system register generation Mark Brown
2022-08-18 12:23 ` [PATCH v4 01/28] arm64/sysreg: Remove stray SMIDR_EL1 defines Mark Brown
2022-08-18 12:23 ` [PATCH v4 02/28] arm64/sysreg: Describe ID_AA64SMFR0_EL1.SMEVer as an enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 03/28] arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK Mark Brown
2022-08-18 12:24 ` [PATCH v4 04/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names Mark Brown
2022-08-18 12:24 ` [PATCH v4 05/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 06/28] arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 07/28] arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names Mark Brown
2022-08-18 12:24 ` [PATCH v4 08/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd Mark Brown
2022-08-18 12:24 ` [PATCH v4 09/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits Mark Brown
2022-08-18 12:24 ` [PATCH v4 10/28] arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields Mark Brown
2022-08-18 12:24 ` Mark Brown [this message]
2022-08-18 12:24 ` [PATCH v4 12/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP Mark Brown
2022-08-18 12:24 ` [PATCH v4 13/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants Mark Brown
2022-08-18 12:24 ` [PATCH v4 14/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants Mark Brown
2022-08-18 12:24 ` [PATCH v4 15/28] arm64/sysreg: Standardise naming for SSBS feature enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 16/28] arm64/sysreg: Standardise naming for MTE " Mark Brown
2022-08-18 12:24 ` [PATCH v4 17/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields Mark Brown
2022-08-18 12:24 ` [PATCH v4 18/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 19/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 20/28] arm64/sysreg: Convert HCRX_EL2 to automatic generation Mark Brown
2022-08-18 12:24 ` [PATCH v4 21/28] arm64/sysreg: Convert ID_AA64MMFR0_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 22/28] arm64/sysreg: Convert ID_AA64MMFR1_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 23/28] arm64/sysreg: Convert ID_AA64MMFR2_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 25/28] arm64/sysreg: Convert ID_AA64PFR1_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 26/28] arm64/sysreg: Convert TIPDR_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 27/28] arm64/sysreg: Convert SCXTNUM_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 28/28] arm64/sysreg: Add defintion for ALLINT Mark Brown

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