From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65122C00140 for ; Thu, 18 Aug 2022 12:48:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FVSePysfC1T1cgtysH9NU5pPIb5JGYmYbigfoUxh9t0=; b=Bi6IZlwHX7g9On rT2ngL5ZEw9oy/av4Ax0Dl3dkdpcRkA+q/1W/TNws73239jqL6aXgIT1cN6A2CnmuzxC/4IpCYsLu lVMcaF2JOCSuSwrfigqlmP60IBkhhfsyOTBK+SFCrnq/3XtdO+nZu0bK/rnYwK5Xu+YlK2c3T94K2 k6Ezo6tw0FjizCW51id6SmOM3yrd0RHdskoFcfgQ41LPDsdS3WGI1fVWzjPCTrKet+BUQrJFtmg0X XK8cUq2ms0KCIXm93PlCCCOtohGL5cfCiTMpf4WJEDRV+bl/K1v3xA2a/kODhfKYosyQl23knjknH 4XQ/bUYckRAVB1gHevMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOevL-004nd3-6a; Thu, 18 Aug 2022 12:47:01 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOeds-004Zua-EI for linux-arm-kernel@lists.infradead.org; Thu, 18 Aug 2022 12:28:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F011D61590; Thu, 18 Aug 2022 12:28:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E802FC433D7; Thu, 18 Aug 2022 12:28:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660825735; bh=UVr6hLShPsPEKFcAkXBwOMSVWskVzutgpgmMw8xu+1g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cd5zamUNvgfrKmivtob0bAbDzop/RDrkt0LV7Q1gMjeyI71ZVExyWwC+wyKX220e6 0vlAw7O4IRvtA9V+Tm23veGCcDn2A3C3z3L/FQhObchh7Gauu0m5RZWpTKgnVcVMFR kjvjgHvb6Fpy5/A2tZPPyTcJ+jiTxJDcRDNcT5nuP79cxAM3s77DNzskc+0uBEFyyY xt6PPeNO0FnL7j/LnuC23eeeFfE/PzZXafirmcBP+yW7R9czgoUf39FkOTUAWPXNan RjpvGBzQFIYcmvreu5mb7P0M7iSjlBqSvXY07m4w7SvfszS/Pc887y3VlgxPyKYK0b Wx6E9olVYokpA== From: Mark Brown To: Catalin Marinas , Will Deacon Cc: Mark Rutland , Kristina Martsenko , linux-arm-kernel@lists.infradead.org, Mark Brown Subject: [PATCH v4 21/28] arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generation Date: Thu, 18 Aug 2022 13:24:18 +0100 Message-Id: <20220818122425.37889-22-broonie@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220818122425.37889-1-broonie@kernel.org> References: <20220818122425.37889-1-broonie@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4180; i=broonie@kernel.org; h=from:subject; bh=UVr6hLShPsPEKFcAkXBwOMSVWskVzutgpgmMw8xu+1g=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBi/i9xEL0D/PV3QaWUYlF4h/dob9djTYS2pqHQ9ABT mJkbRPiJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCYv4vcQAKCRAk1otyXVSH0JvTB/ 9EPcdGDgRlaS+ab5HJK/vmJMmdzCNup8UY//GJrYs1ps0ZMoQuZEvmiqzYWFlHGMA7HQW8G72rus0H x43ftwRVsinro4kXjwVSrUSzpUJFBn0swen9x8wuxtbP1ir2DluN/zaOsXUC8HqMltuF2g0smxTR2F gZj4/btNOPfK6nMNhkCFgU4oJKSkn+wKIdhvKa5RYvLp9qXEWBfYL5gcyweRaO2G68DNcSvVEqUPXO Xr3Dtr0AI4IupYtEAlnStRHBMJZIUC+pVuT+8MvpxgT78dNwR3IkwMPeTcAZ5dfbEmKX8dRu2ENIwO /QlyxwuAT4BqnN77V9g39Vp7zbUNks X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_052856_632521_EE6B0CB5 X-CRM114-Status: GOOD ( 11.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Automatically generate most of the defines for ID_AA64MMFR0_EL1 mostly as per DDI0487H.a. Due to the large amount of MixedCase in this register which isn't really consistent with either the kernel style or the majority of the architecture the use of upper case is preserved. We also leave in place a number of min/max/default value definitions which don't flow from the architecture definitions. No functional changes. Signed-off-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 30 -------------- arch/arm64/tools/sysreg | 73 +++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+), 30 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 6c040815efcf..05439cb61f1d 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -199,7 +199,6 @@ #define SYS_ID_AA64AFR0_EL1 sys_reg(3, 0, 0, 5, 4) #define SYS_ID_AA64AFR1_EL1 sys_reg(3, 0, 0, 5, 5) -#define SYS_ID_AA64MMFR0_EL1 sys_reg(3, 0, 0, 7, 0) #define SYS_ID_AA64MMFR1_EL1 sys_reg(3, 0, 0, 7, 1) #define SYS_ID_AA64MMFR2_EL1 sys_reg(3, 0, 0, 7, 2) @@ -731,42 +730,13 @@ #define ID_AA64PFR1_EL1_MTE_MTE3 0x3 /* id_aa64mmfr0 */ -#define ID_AA64MMFR0_EL1_ECV_SHIFT 60 -#define ID_AA64MMFR0_EL1_FGT_SHIFT 56 -#define ID_AA64MMFR0_EL1_EXS_SHIFT 44 -#define ID_AA64MMFR0_EL1_TGRAN4_2_SHIFT 40 -#define ID_AA64MMFR0_EL1_TGRAN64_2_SHIFT 36 -#define ID_AA64MMFR0_EL1_TGRAN16_2_SHIFT 32 -#define ID_AA64MMFR0_EL1_TGRAN4_SHIFT 28 -#define ID_AA64MMFR0_EL1_TGRAN64_SHIFT 24 -#define ID_AA64MMFR0_EL1_TGRAN16_SHIFT 20 -#define ID_AA64MMFR0_EL1_BIGENDEL0_SHIFT 16 -#define ID_AA64MMFR0_EL1_SNSMEM_SHIFT 12 -#define ID_AA64MMFR0_EL1_BIGEND_SHIFT 8 -#define ID_AA64MMFR0_EL1_ASIDBITS_SHIFT 4 -#define ID_AA64MMFR0_EL1_PARANGE_SHIFT 0 - -#define ID_AA64MMFR0_EL1_ASIDBITS_8 0x0 -#define ID_AA64MMFR0_EL1_ASIDBITS_16 0x2 - -#define ID_AA64MMFR0_EL1_TGRAN4_NI 0xf #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN 0x0 #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX 0x7 -#define ID_AA64MMFR0_EL1_TGRAN64_NI 0xf #define ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN 0x0 #define ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX 0x7 -#define ID_AA64MMFR0_EL1_TGRAN16_NI 0x0 #define ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN 0x1 #define ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX 0xf -#define ID_AA64MMFR0_EL1_PARANGE_32 0x0 -#define ID_AA64MMFR0_EL1_PARANGE_36 0x1 -#define ID_AA64MMFR0_EL1_PARANGE_40 0x2 -#define ID_AA64MMFR0_EL1_PARANGE_42 0x3 -#define ID_AA64MMFR0_EL1_PARANGE_44 0x4 -#define ID_AA64MMFR0_EL1_PARANGE_48 0x5 -#define ID_AA64MMFR0_EL1_PARANGE_52 0x6 - #define ARM64_MIN_PARANGE_BITS 32 #define ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_DEFAULT 0x0 diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index b9730fc81e95..d998dda53a8c 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -315,6 +315,79 @@ Enum 3:0 WFxT EndEnum EndSysreg +Sysreg ID_AA64MMFR0_EL1 3 0 0 7 0 +Enum 63:60 ECV + 0b0000 NI + 0b0001 IMP + 0b0010 CNTPOFF +EndEnum +Enum 59:56 FGT + 0b0000 NI + 0b0001 IMP +EndEnum +Res0 55:48 +Enum 47:44 EXS + 0b0000 NI + 0b0001 IMP +EndEnum +Enum 43:40 TGRAN4_2 + 0b0000 TGRAN4 + 0b0001 NI + 0b0010 IMP + 0b0011 52_BIT +EndEnum +Enum 39:36 TGRAN64_2 + 0b0000 TGRAN64 + 0b0001 NI + 0b0010 IMP +EndEnum +Enum 35:32 TGRAN16_2 + 0b0000 TGRAN16 + 0b0001 NI + 0b0010 IMP + 0b0011 52_BIT +EndEnum +Enum 31:28 TGRAN4 + 0b0000 IMP + 0b0001 52_BIT + 0b1111 NI +EndEnum +Enum 27:24 TGRAN64 + 0b0000 IMP + 0b1111 NI +EndEnum +Enum 23:20 TGRAN16 + 0b0000 NI + 0b0001 IMP + 0b0010 52_BIT +EndEnum +Enum 19:16 BIGENDEL0 + 0b0000 NI + 0b0001 IMP +EndEnum +Enum 15:12 SNSMEM + 0b0000 NI + 0b0001 IMP +EndEnum +Enum 11:8 BIGEND + 0b0000 NI + 0b0001 IMP +EndEnum +Enum 7:4 ASIDBITS + 0b0000 8 + 0b0001 16 +EndEnum +Enum 3:0 PARANGE + 0b0000 32 + 0b0001 36 + 0b0010 40 + 0b0011 42 + 0b0100 44 + 0b0101 48 + 0b0110 52 +EndEnum +EndSysreg + Sysreg SCTLR_EL1 3 0 1 0 0 Field 63 TIDCP Field 62 SPINMASK -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel