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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 25/28] arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generation
Date: Thu, 18 Aug 2022 13:24:22 +0100	[thread overview]
Message-ID: <20220818122425.37889-26-broonie@kernel.org> (raw)
In-Reply-To: <20220818122425.37889-1-broonie@kernel.org>

Convert ID_AA64PFR1_EL1 to be automatically generated as per DDI04187H.a,
no functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 21 ---------------
 arch/arm64/tools/sysreg         | 45 +++++++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+), 21 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 99c907fea6e7..795e97ffbfe8 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -190,8 +190,6 @@
 #define SYS_MVFR1_EL1			sys_reg(3, 0, 0, 3, 1)
 #define SYS_MVFR2_EL1			sys_reg(3, 0, 0, 3, 2)
 
-#define SYS_ID_AA64PFR1_EL1		sys_reg(3, 0, 0, 4, 1)
-
 #define SYS_ID_AA64DFR0_EL1		sys_reg(3, 0, 0, 5, 0)
 #define SYS_ID_AA64DFR1_EL1		sys_reg(3, 0, 0, 5, 1)
 
@@ -683,25 +681,6 @@
 #define ID_AA64PFR0_EL1_ELx_64BIT_ONLY		0x1
 #define ID_AA64PFR0_EL1_ELx_32BIT_64BIT		0x2
 
-/* id_aa64pfr1 */
-#define ID_AA64PFR1_EL1_SME_SHIFT	24
-#define ID_AA64PFR1_EL1_MPAM_frac_SHIFT	16
-#define ID_AA64PFR1_EL1_RAS_frac_SHIFT	12
-#define ID_AA64PFR1_EL1_MTE_SHIFT	8
-#define ID_AA64PFR1_EL1_SSBS_SHIFT	4
-#define ID_AA64PFR1_EL1_BT_SHIFT	0
-
-#define ID_AA64PFR1_EL1_SSBS_NI		0
-#define ID_AA64PFR1_EL1_SSBS_IMP	1
-#define ID_AA64PFR1_EL1_SSBS_SSBS2	2
-#define ID_AA64PFR1_EL1_BT_IMP		0x1
-#define ID_AA64PFR1_EL1_SME_IMP		1
-
-#define ID_AA64PFR1_EL1_MTE_NI		0x0
-#define ID_AA64PFR1_EL1_MTE_IMP		0x1
-#define ID_AA64PFR1_EL1_MTE_MTE2	0x2
-#define ID_AA64PFR1_EL1_MTE_MTE3	0x3
-
 /* id_aa64mmfr0 */
 #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN	0x0
 #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX	0x7
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index fc32b0649160..e4793b01c647 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -123,6 +123,51 @@ Enum	3:0	EL0
 EndEnum
 EndSysreg
 
+Sysreg	ID_AA64PFR1_EL1	3	0	0	4	1
+Res0	63:40
+Enum	39:36	NMI
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	35:32	CSV2_frac
+	0b0000	NI
+	0b0001	CSV2_1p1
+	0b0010	CSV2_1p2
+EndEnum
+Enum	31:28	RNDR_trap
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	27:24	SME
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Res0	23:20
+Enum	19:16	MPAM_frac
+	0b0000	MINOR_0
+	0b0001	MINOR_1
+EndEnum
+Enum	15:12	RAS_frac
+	0b0000	NI
+	0b0001	RASv1p1
+EndEnum
+Enum	11:8	MTE
+	0b0000	NI
+	0b0001	IMP
+	0b0010	MTE2
+	0b0011	MTE3
+EndEnum
+Enum	7:4	SSBS
+	0b0000	NI
+	0b0001	IMP
+	0b0010	SSBS2
+EndEnum
+Enum	3:0	BT
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+EndSysreg
+
 Sysreg	ID_AA64ZFR0_EL1	3	0	0	4	4
 Res0	63:60
 Enum	59:56	F64MM
-- 
2.30.2


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  parent reply	other threads:[~2022-08-18 12:52 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 12:23 [PATCH v4 00/28] arm64/sysreg: More system register generation Mark Brown
2022-08-18 12:23 ` [PATCH v4 01/28] arm64/sysreg: Remove stray SMIDR_EL1 defines Mark Brown
2022-08-18 12:23 ` [PATCH v4 02/28] arm64/sysreg: Describe ID_AA64SMFR0_EL1.SMEVer as an enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 03/28] arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK Mark Brown
2022-08-18 12:24 ` [PATCH v4 04/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names Mark Brown
2022-08-18 12:24 ` [PATCH v4 05/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 06/28] arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 07/28] arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names Mark Brown
2022-08-18 12:24 ` [PATCH v4 08/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd Mark Brown
2022-08-18 12:24 ` [PATCH v4 09/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits Mark Brown
2022-08-18 12:24 ` [PATCH v4 10/28] arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields Mark Brown
2022-08-18 12:24 ` [PATCH v4 11/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange Mark Brown
2022-08-18 12:24 ` [PATCH v4 12/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP Mark Brown
2022-08-18 12:24 ` [PATCH v4 13/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants Mark Brown
2022-08-18 12:24 ` [PATCH v4 14/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants Mark Brown
2022-08-18 12:24 ` [PATCH v4 15/28] arm64/sysreg: Standardise naming for SSBS feature enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 16/28] arm64/sysreg: Standardise naming for MTE " Mark Brown
2022-08-18 12:24 ` [PATCH v4 17/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields Mark Brown
2022-08-18 12:24 ` [PATCH v4 18/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 19/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration Mark Brown
2022-08-18 12:24 ` [PATCH v4 20/28] arm64/sysreg: Convert HCRX_EL2 to automatic generation Mark Brown
2022-08-18 12:24 ` [PATCH v4 21/28] arm64/sysreg: Convert ID_AA64MMFR0_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 22/28] arm64/sysreg: Convert ID_AA64MMFR1_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 23/28] arm64/sysreg: Convert ID_AA64MMFR2_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 " Mark Brown
2022-08-18 12:24 ` Mark Brown [this message]
2022-08-18 12:24 ` [PATCH v4 26/28] arm64/sysreg: Convert TIPDR_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 27/28] arm64/sysreg: Convert SCXTNUM_EL1 " Mark Brown
2022-08-18 12:24 ` [PATCH v4 28/28] arm64/sysreg: Add defintion for ALLINT Mark Brown

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