* [PATCH v26 1/4] dt-binding: mediatek: add bindings for MediaTek MDP3 components
2022-08-19 8:54 [PATCH v26 0/4] media: mediatek: support mdp3 on mt8183 platform Moudy Ho
@ 2022-08-19 8:54 ` Moudy Ho
2022-08-19 8:54 ` [PATCH v26 2/4] dt-binding: mediatek: add bindings for MediaTek CCORR and WDMA Moudy Ho
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Moudy Ho @ 2022-08-19 8:54 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger,
Krzysztof Kozlowski, Hans Verkuil
Cc: Chun-Kuang Hu, Rob Landley, Laurent Pinchart, linux-media,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Alexandre Courbot, tfiga, drinkcat, pihsun, hsinyi,
Benjamin Gaignard, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, cellopoint.kai, Moudy Ho
This patch adds DT binding documents for Media Data Path 3 (MDP3)
a unit in multimedia system combined with several components and
used for scaling and color format convert.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../bindings/media/mediatek,mdp3-rdma.yaml | 95 +++++++++++++++++++
.../bindings/media/mediatek,mdp3-rsz.yaml | 77 +++++++++++++++
.../bindings/media/mediatek,mdp3-wrot.yaml | 80 ++++++++++++++++
3 files changed, 252 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
new file mode 100644
index 000000000000..94ff74d9c04a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Read Direct Memory Access
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
+
+description: |
+ MediaTek Read Direct Memory Access(RDMA) component used to do read DMA.
+ It contains one line buffer to store the sufficient pixel data, and
+ must be siblings to the central MMSYS_CONFIG node.
+ For a description of the MMSYS_CONFIG binding, see
+ Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+ for details.
+
+properties:
+ compatible:
+ items:
+ - const: mediatek,mt8183-mdp3-rdma
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ $ref: '/schemas/types.yaml#/definitions/phandle-array'
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ description: The register of client driver can be configured by gce with
+ 4 arguments defined in this property. Each GCE subsys id is mapping to
+ a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
+
+ mediatek,gce-events:
+ description:
+ The event id which is mapping to the specific hardware event signal
+ to gce. The event id is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: RDMA clock
+ - description: RSZ clock
+
+ iommus:
+ maxItems: 1
+
+ mboxes:
+ items:
+ - description: used for 1st data pipe from RDMA
+ - description: used for 2nd data pipe from RDMA
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - mediatek,gce-events
+ - power-domains
+ - clocks
+ - iommus
+ - mboxes
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/gce/mt8183-gce.h>
+ #include <dt-bindings/power/mt8183-power.h>
+ #include <dt-bindings/memory/mt8183-larb-port.h>
+
+ mdp3_rdma0: mdp3-rdma0@14001000 {
+ compatible = "mediatek,mt8183-mdp3-rdma";
+ reg = <0x14001000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
+ <CMDQ_EVENT_MDP_RDMA0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_RDMA0>,
+ <&mmsys CLK_MM_MDP_RSZ1>;
+ iommus = <&iommu>;
+ mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>,
+ <&gce 21 CMDQ_THR_PRIO_LOWEST>;
+ };
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml
new file mode 100644
index 000000000000..22c61ed00fdd
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Resizer
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
+
+description: |
+ One of Media Data Path 3 (MDP3) components used to do frame resizing.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8183-mdp3-rsz
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ description: The register of client driver can be configured by gce with
+ 4 arguments defined in this property. Each GCE subsys id is mapping to
+ a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
+
+ mediatek,gce-events:
+ description:
+ The event id which is mapping to the specific hardware event signal
+ to gce. The event id is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ clocks:
+ minItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - mediatek,gce-events
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/gce/mt8183-gce.h>
+
+ mdp3_rsz0: mdp3-rsz0@14003000 {
+ compatible = "mediatek,mt8183-mdp3-rsz";
+ reg = <0x14003000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ0_SOF>,
+ <CMDQ_EVENT_MDP_RSZ0_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_RSZ0>;
+ };
+
+ mdp3_rsz1: mdp3-rsz1@14004000 {
+ compatible = "mediatek,mt8183-mdp3-rsz";
+ reg = <0x14004000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ1_SOF>,
+ <CMDQ_EVENT_MDP_RSZ1_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_RSZ1>;
+ };
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml
new file mode 100644
index 000000000000..76c010720d43
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Write DMA with Rotation
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
+
+description: |
+ One of Media Data Path 3 (MDP3) components used to write DMA with frame rotation.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8183-mdp3-wrot
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ description: The register of client driver can be configured by gce with
+ 4 arguments defined in this property. Each GCE subsys id is mapping to
+ a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
+
+ mediatek,gce-events:
+ description:
+ The event id which is mapping to the specific hardware event signal
+ to gce. The event id is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+ iommus:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - mediatek,gce-events
+ - power-domains
+ - clocks
+ - iommus
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/gce/mt8183-gce.h>
+ #include <dt-bindings/power/mt8183-power.h>
+ #include <dt-bindings/memory/mt8183-larb-port.h>
+
+ mdp3_wrot0: mdp3-wrot0@14005000 {
+ compatible = "mediatek,mt8183-mdp3-wrot";
+ reg = <0x14005000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_WROT0_SOF>,
+ <CMDQ_EVENT_MDP_WROT0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_WROT0>;
+ iommus = <&iommu>;
+ };
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v26 2/4] dt-binding: mediatek: add bindings for MediaTek CCORR and WDMA
2022-08-19 8:54 [PATCH v26 0/4] media: mediatek: support mdp3 on mt8183 platform Moudy Ho
2022-08-19 8:54 ` [PATCH v26 1/4] dt-binding: mediatek: add bindings for MediaTek MDP3 components Moudy Ho
@ 2022-08-19 8:54 ` Moudy Ho
2022-08-19 8:54 ` [PATCH v26 3/4] arm64: dts: mt8183: add MediaTek MDP3 nodes Moudy Ho
[not found] ` <20220819085423.17023-5-moudy.ho@mediatek.com>
3 siblings, 0 replies; 6+ messages in thread
From: Moudy Ho @ 2022-08-19 8:54 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger,
Krzysztof Kozlowski, Hans Verkuil
Cc: Chun-Kuang Hu, Rob Landley, Laurent Pinchart, linux-media,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Alexandre Courbot, tfiga, drinkcat, pihsun, hsinyi,
Benjamin Gaignard, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, cellopoint.kai, Moudy Ho
This patch adds DT binding documentation for MediaTek's CCORR and
WDMA components.
These components exist in both MediaTek's Media Data Path 3(MDP3) and DRM,
and the bindings are placed under the folder "./soc/mediatek" to prevent
duplicate builds.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../bindings/soc/mediatek/mediatek,ccorr.yaml | 68 ++++++++++++++++
.../bindings/soc/mediatek/mediatek,wdma.yaml | 81 +++++++++++++++++++
2 files changed, 149 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml
new file mode 100644
index 000000000000..10786d769750
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,ccorr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek color correction
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
+
+description: |
+ MediaTek color correction with 3X3 matrix.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8183-mdp3-ccorr
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ description: The register of client driver can be configured by gce with
+ 4 arguments defined in this property. Each GCE subsys id is mapping to
+ a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
+
+ mediatek,gce-events:
+ description:
+ The event id which is mapping to the specific hardware event signal
+ to gce. The event id is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ clocks:
+ minItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - mediatek,gce-events
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/gce/mt8183-gce.h>
+
+ mdp3_ccorr: mdp3-ccorr@1401c000 {
+ compatible = "mediatek,mt8183-mdp3-ccorr";
+ reg = <0x1401c000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_CCORR_SOF>,
+ <CMDQ_EVENT_MDP_CCORR_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_CCORR>;
+ };
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml
new file mode 100644
index 000000000000..95ec19543945
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml
@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,wdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Write Direct Memory Access
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
+
+description: |
+ MediaTek Write Direct Memory Access(WDMA) component used to write
+ the data into DMA.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8183-mdp3-wdma
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ description: The register of client driver can be configured by gce with
+ 4 arguments defined in this property. Each GCE subsys id is mapping to
+ a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
+
+ mediatek,gce-events:
+ description:
+ The event id which is mapping to the specific hardware event signal
+ to gce. The event id is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+ iommus:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - mediatek,gce-events
+ - power-domains
+ - clocks
+ - iommus
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/gce/mt8183-gce.h>
+ #include <dt-bindings/power/mt8183-power.h>
+ #include <dt-bindings/memory/mt8183-larb-port.h>
+
+ mdp3_wdma: mdp3-wdma@14006000 {
+ compatible = "mediatek,mt8183-mdp3-wdma";
+ reg = <0x14006000 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_WDMA0_SOF>,
+ <CMDQ_EVENT_MDP_WDMA0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_WDMA0>;
+ iommus = <&iommu>;
+ };
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v26 3/4] arm64: dts: mt8183: add MediaTek MDP3 nodes
2022-08-19 8:54 [PATCH v26 0/4] media: mediatek: support mdp3 on mt8183 platform Moudy Ho
2022-08-19 8:54 ` [PATCH v26 1/4] dt-binding: mediatek: add bindings for MediaTek MDP3 components Moudy Ho
2022-08-19 8:54 ` [PATCH v26 2/4] dt-binding: mediatek: add bindings for MediaTek CCORR and WDMA Moudy Ho
@ 2022-08-19 8:54 ` Moudy Ho
[not found] ` <20220819085423.17023-5-moudy.ho@mediatek.com>
3 siblings, 0 replies; 6+ messages in thread
From: Moudy Ho @ 2022-08-19 8:54 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger,
Krzysztof Kozlowski, Hans Verkuil
Cc: Chun-Kuang Hu, Rob Landley, Laurent Pinchart, linux-media,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Alexandre Courbot, tfiga, drinkcat, pihsun, hsinyi,
Benjamin Gaignard, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, cellopoint.kai, Moudy Ho
Add device nodes for Media Data Path 3 (MDP3) modules.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 63 ++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 9d32871973a2..1543876b1e3c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1691,6 +1691,60 @@
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
};
+ mdp3-rdma0@14001000 {
+ compatible = "mediatek,mt8183-mdp3-rdma";
+ reg = <0 0x14001000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
+ <CMDQ_EVENT_MDP_RDMA0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_RDMA0>,
+ <&mmsys CLK_MM_MDP_RSZ1>;
+ iommus = <&iommu M4U_PORT_MDP_RDMA0>;
+ mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>,
+ <&gce 21 CMDQ_THR_PRIO_LOWEST 0>;
+ };
+
+ mdp3-rsz0@14003000 {
+ compatible = "mediatek,mt8183-mdp3-rsz";
+ reg = <0 0x14003000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ0_SOF>,
+ <CMDQ_EVENT_MDP_RSZ0_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_RSZ0>;
+ };
+
+ mdp3-rsz1@14004000 {
+ compatible = "mediatek,mt8183-mdp3-rsz";
+ reg = <0 0x14004000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ1_SOF>,
+ <CMDQ_EVENT_MDP_RSZ1_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_RSZ1>;
+ };
+
+ mdp3-wrot0@14005000 {
+ compatible = "mediatek,mt8183-mdp3-wrot";
+ reg = <0 0x14005000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_WROT0_SOF>,
+ <CMDQ_EVENT_MDP_WROT0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_WROT0>;
+ iommus = <&iommu M4U_PORT_MDP_WROT0>;
+ };
+
+ mdp3-wdma@14006000 {
+ compatible = "mediatek,mt8183-mdp3-wdma";
+ reg = <0 0x14006000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_WDMA0_SOF>,
+ <CMDQ_EVENT_MDP_WDMA0_EOF>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_MDP_WDMA0>;
+ iommus = <&iommu M4U_PORT_MDP_WDMA0>;
+ };
+
ovl0: ovl@14008000 {
compatible = "mediatek,mt8183-disp-ovl";
reg = <0 0x14008000 0 0x1000>;
@@ -1834,6 +1888,15 @@
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
};
+ mdp3-ccorr@1401c000 {
+ compatible = "mediatek,mt8183-mdp3-ccorr";
+ reg = <0 0x1401c000 0 0x1000>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>;
+ mediatek,gce-events = <CMDQ_EVENT_MDP_CCORR_SOF>,
+ <CMDQ_EVENT_MDP_CCORR_EOF>;
+ clocks = <&mmsys CLK_MM_MDP_CCORR>;
+ };
+
imgsys: syscon@15020000 {
compatible = "mediatek,mt8183-imgsys", "syscon";
reg = <0 0x15020000 0 0x1000>;
--
2.18.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread[parent not found: <20220819085423.17023-5-moudy.ho@mediatek.com>]
* Re: [PATCH v26 4/4] media: platform: mtk-mdp3: add MediaTek MDP3 driver
[not found] ` <20220819085423.17023-5-moudy.ho@mediatek.com>
@ 2022-08-19 15:37 ` Hans Verkuil
2022-08-20 4:33 ` 20181221122106 created
0 siblings, 1 reply; 6+ messages in thread
From: Hans Verkuil @ 2022-08-19 15:37 UTC (permalink / raw)
To: Moudy Ho, Mauro Carvalho Chehab, Rob Herring, Matthias Brugger,
Krzysztof Kozlowski
Cc: Chun-Kuang Hu, Rob Landley, Laurent Pinchart, linux-media,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Alexandre Courbot, tfiga, drinkcat, pihsun, hsinyi,
Benjamin Gaignard, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, cellopoint.kai,
Ping-Hsun Wu, daoyuan huang
Hi Moudy,
On 19/08/2022 10:54, Moudy Ho wrote:
> This patch adds driver for MediaTek's Media Data Path ver.3 (MDP3).
> It provides the following functions:
> color transform, format conversion, resize, crop, rotate, flip
> and additional image quality enhancement.
>
> The MDP3 driver is mainly used for Google Chromebook products to
> import the new architecture to set the HW settings as shown below:
> User -> V4L2 framework
> -> MDP3 driver -> SCP (setting calculations)
> -> MDP3 driver -> CMDQ (GCE driver) -> HW
>
> Each modules' related operation control is sited in mtk-mdp3-comp.c
> Each modules' register table is defined in file with "mdp_reg_" prefix
> GCE related API, operation control sited in mtk-mdp3-cmdq.c
> V4L2 m2m device functions are implemented in mtk-mdp3-m2m.c
> Probe, power, suspend/resume, system level functions are defined in
> mtk-mdp3-core.c
>
> Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
> Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> drivers/media/platform/mediatek/Kconfig | 1 +
> drivers/media/platform/mediatek/Makefile | 1 +
> drivers/media/platform/mediatek/mdp3/Kconfig | 20 +
> drivers/media/platform/mediatek/mdp3/Makefile | 6 +
> .../platform/mediatek/mdp3/mdp_reg_ccorr.h | 19 +
> .../platform/mediatek/mdp3/mdp_reg_rdma.h | 65 ++
> .../platform/mediatek/mdp3/mdp_reg_rsz.h | 39 +
> .../platform/mediatek/mdp3/mdp_reg_wdma.h | 47 +
> .../platform/mediatek/mdp3/mdp_reg_wrot.h | 55 +
> .../platform/mediatek/mdp3/mtk-img-ipi.h | 290 +++++
> .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 466 ++++++++
> .../platform/mediatek/mdp3/mtk-mdp3-cmdq.h | 43 +
> .../platform/mediatek/mdp3/mtk-mdp3-comp.c | 1031 +++++++++++++++++
> .../platform/mediatek/mdp3/mtk-mdp3-comp.h | 186 +++
> .../platform/mediatek/mdp3/mtk-mdp3-core.c | 357 ++++++
> .../platform/mediatek/mdp3/mtk-mdp3-core.h | 94 ++
> .../platform/mediatek/mdp3/mtk-mdp3-m2m.c | 724 ++++++++++++
> .../platform/mediatek/mdp3/mtk-mdp3-m2m.h | 48 +
> .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 733 ++++++++++++
> .../platform/mediatek/mdp3/mtk-mdp3-regs.h | 373 ++++++
> .../platform/mediatek/mdp3/mtk-mdp3-vpu.c | 313 +++++
> .../platform/mediatek/mdp3/mtk-mdp3-vpu.h | 78 ++
> 22 files changed, 4989 insertions(+)
> create mode 100644 drivers/media/platform/mediatek/mdp3/Kconfig
> create mode 100644 drivers/media/platform/mediatek/mdp3/Makefile
> create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_ccorr.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_rdma.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_rsz.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_wdma.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_wrot.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-img-ipi.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.h
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-vpu.c
> create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-vpu.h
>
> diff --git a/drivers/media/platform/mediatek/Kconfig b/drivers/media/platform/mediatek/Kconfig
> index af47d9888552..84104e2cd024 100644
> --- a/drivers/media/platform/mediatek/Kconfig
> +++ b/drivers/media/platform/mediatek/Kconfig
> @@ -6,3 +6,4 @@ source "drivers/media/platform/mediatek/jpeg/Kconfig"
> source "drivers/media/platform/mediatek/mdp/Kconfig"
> source "drivers/media/platform/mediatek/vcodec/Kconfig"
> source "drivers/media/platform/mediatek/vpu/Kconfig"
> +source "drivers/media/platform/mediatek/mdp3/Kconfig"
> diff --git a/drivers/media/platform/mediatek/Makefile b/drivers/media/platform/mediatek/Makefile
> index d3850a13f128..38e6ba917fe5 100644
> --- a/drivers/media/platform/mediatek/Makefile
> +++ b/drivers/media/platform/mediatek/Makefile
> @@ -3,3 +3,4 @@ obj-y += jpeg/
> obj-y += mdp/
> obj-y += vcodec/
> obj-y += vpu/
> +obj-y += mdp3/
> diff --git a/drivers/media/platform/mediatek/mdp3/Kconfig b/drivers/media/platform/mediatek/mdp3/Kconfig
> new file mode 100644
> index 000000000000..8c8e59687417
> --- /dev/null
> +++ b/drivers/media/platform/mediatek/mdp3/Kconfig
> @@ -0,0 +1,20 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +config VIDEO_MEDIATEK_MDP3
> + tristate "MediaTek MDP v3 driver"
> + depends on MTK_IOMMU || COMPILE_TEST
> + depends on VIDEO_DEV
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + depends on MTK_MMSYS || COMPILE_TEST
It turned out that this will cause link errors if MTK_MMSYS is not set:
ERROR: modpost: "mtk_mutex_write_sof" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_enable_by_cmdq" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_put" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_write_mod" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_unprepare" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_get" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
ERROR: modpost: "mtk_mutex_prepare" [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
I wonder if it isn't better to do 'select MTK_MMSYS': that seems to work fine.
What do you think?
Regards,
Hans
> + depends on HAS_DMA
> + select VIDEOBUF2_DMA_CONTIG
> + select V4L2_MEM2MEM_DEV
> + select VIDEO_MEDIATEK_VPU
> + select MTK_CMDQ
> + select MTK_SCP
> + default n
> + help
> + It is a v4l2 driver and present in MediaTek MT8183 SoC.
> + The driver supports scaling and color space conversion.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called mtk-mdp3.
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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v26 4/4] media: platform: mtk-mdp3: add MediaTek MDP3 driver
2022-08-19 15:37 ` [PATCH v26 4/4] media: platform: mtk-mdp3: add MediaTek MDP3 driver Hans Verkuil
@ 2022-08-20 4:33 ` 20181221122106 created
0 siblings, 0 replies; 6+ messages in thread
From: 20181221122106 created @ 2022-08-20 4:33 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Matthias Brugger, Krzysztof Kozlowski
Cc: Chun-Kuang Hu, Rob Landley, Laurent Pinchart, linux-media,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Alexandre Courbot, tfiga, drinkcat, pihsun, hsinyi,
Benjamin Gaignard, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, cellopoint.kai,
Ping-Hsun Wu, daoyuan huang
Hi Hans,
On Fri, 2022-08-19 at 17:37 +0200, Hans Verkuil wrote:
> Hi Moudy,
>
> On 19/08/2022 10:54, Moudy Ho wrote:
> > This patch adds driver for MediaTek's Media Data Path ver.3 (MDP3).
> > It provides the following functions:
> > color transform, format conversion, resize, crop, rotate, flip
> > and additional image quality enhancement.
> >
> > The MDP3 driver is mainly used for Google Chromebook products to
> > import the new architecture to set the HW settings as shown below:
> > User -> V4L2 framework
> > -> MDP3 driver -> SCP (setting calculations)
> > -> MDP3 driver -> CMDQ (GCE driver) -> HW
> >
> > Each modules' related operation control is sited in mtk-mdp3-comp.c
> > Each modules' register table is defined in file with "mdp_reg_"
> > prefix
> > GCE related API, operation control sited in mtk-mdp3-cmdq.c
> > V4L2 m2m device functions are implemented in mtk-mdp3-m2m.c
> > Probe, power, suspend/resume, system level functions are defined in
> > mtk-mdp3-core.c
> >
> > Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
> > Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com>
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > Tested-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> > drivers/media/platform/mediatek/Kconfig | 1 +
> > drivers/media/platform/mediatek/Makefile | 1 +
> > drivers/media/platform/mediatek/mdp3/Kconfig | 20 +
> > drivers/media/platform/mediatek/mdp3/Makefile | 6 +
> > .../platform/mediatek/mdp3/mdp_reg_ccorr.h | 19 +
> > .../platform/mediatek/mdp3/mdp_reg_rdma.h | 65 ++
> > .../platform/mediatek/mdp3/mdp_reg_rsz.h | 39 +
> > .../platform/mediatek/mdp3/mdp_reg_wdma.h | 47 +
> > .../platform/mediatek/mdp3/mdp_reg_wrot.h | 55 +
> > .../platform/mediatek/mdp3/mtk-img-ipi.h | 290 +++++
> > .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 466 ++++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-cmdq.h | 43 +
> > .../platform/mediatek/mdp3/mtk-mdp3-comp.c | 1031
> > +++++++++++++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-comp.h | 186 +++
> > .../platform/mediatek/mdp3/mtk-mdp3-core.c | 357 ++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-core.h | 94 ++
> > .../platform/mediatek/mdp3/mtk-mdp3-m2m.c | 724 ++++++++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-m2m.h | 48 +
> > .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 733 ++++++++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-regs.h | 373 ++++++
> > .../platform/mediatek/mdp3/mtk-mdp3-vpu.c | 313 +++++
> > .../platform/mediatek/mdp3/mtk-mdp3-vpu.h | 78 ++
> > 22 files changed, 4989 insertions(+)
> > create mode 100644 drivers/media/platform/mediatek/mdp3/Kconfig
> > create mode 100644 drivers/media/platform/mediatek/mdp3/Makefile
> > create mode 100644
> > drivers/media/platform/mediatek/mdp3/mdp_reg_ccorr.h
> > create mode 100644
> > drivers/media/platform/mediatek/mdp3/mdp_reg_rdma.h
> > create mode 100644
> > drivers/media/platform/mediatek/mdp3/mdp_reg_rsz.h
> > create mode 100644
> > drivers/media/platform/mediatek/mdp3/mdp_reg_wdma.h
> > create mode 100644
> > drivers/media/platform/mediatek/mdp3/mdp_reg_wrot.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-img-
> > ipi.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > cmdq.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > cmdq.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > comp.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > comp.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > core.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > core.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > m2m.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > m2m.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > regs.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > regs.h
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > vpu.c
> > create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-
> > vpu.h
> >
> > diff --git a/drivers/media/platform/mediatek/Kconfig
> > b/drivers/media/platform/mediatek/Kconfig
> > index af47d9888552..84104e2cd024 100644
> > --- a/drivers/media/platform/mediatek/Kconfig
> > +++ b/drivers/media/platform/mediatek/Kconfig
> > @@ -6,3 +6,4 @@ source
> > "drivers/media/platform/mediatek/jpeg/Kconfig"
> > source "drivers/media/platform/mediatek/mdp/Kconfig"
> > source "drivers/media/platform/mediatek/vcodec/Kconfig"
> > source "drivers/media/platform/mediatek/vpu/Kconfig"
> > +source "drivers/media/platform/mediatek/mdp3/Kconfig"
> > diff --git a/drivers/media/platform/mediatek/Makefile
> > b/drivers/media/platform/mediatek/Makefile
> > index d3850a13f128..38e6ba917fe5 100644
> > --- a/drivers/media/platform/mediatek/Makefile
> > +++ b/drivers/media/platform/mediatek/Makefile
> > @@ -3,3 +3,4 @@ obj-y += jpeg/
> > obj-y += mdp/
> > obj-y += vcodec/
> > obj-y += vpu/
> > +obj-y += mdp3/
> > diff --git a/drivers/media/platform/mediatek/mdp3/Kconfig
> > b/drivers/media/platform/mediatek/mdp3/Kconfig
> > new file mode 100644
> > index 000000000000..8c8e59687417
> > --- /dev/null
> > +++ b/drivers/media/platform/mediatek/mdp3/Kconfig
> > @@ -0,0 +1,20 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +config VIDEO_MEDIATEK_MDP3
> > + tristate "MediaTek MDP v3 driver"
> > + depends on MTK_IOMMU || COMPILE_TEST
> > + depends on VIDEO_DEV
> > + depends on ARCH_MEDIATEK || COMPILE_TEST
> > + depends on MTK_MMSYS || COMPILE_TEST
>
> It turned out that this will cause link errors if MTK_MMSYS is not
> set:
>
> ERROR: modpost: "mtk_mutex_write_sof"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_enable_by_cmdq"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_put"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_write_mod"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_unprepare"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_get"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
> ERROR: modpost: "mtk_mutex_prepare"
> [drivers/media/platform/mediatek/mdp3/mtk-mdp3.ko] undefined!
>
> I wonder if it isn't better to do 'select MTK_MMSYS': that seems to
> work fine.
>
> What do you think?
>
> Regards,
>
> Hans
>
Thank you for bringing this up for discussion, this was added on v10 at
Geert's suggestion.
But I didn't take into account all the conditions to avoid the issue
you mentioned, and replacing "depend on" with "select" would be a
better option to avoid compilation errors in various combinations.
Please allow me to release a new version that fixes this problem.
Thanks,
Moudy Ho
> > + depends on HAS_DMA
> > + select VIDEOBUF2_DMA_CONTIG
> > + select V4L2_MEM2MEM_DEV
> > + select VIDEO_MEDIATEK_VPU
> > + select MTK_CMDQ
> > + select MTK_SCP
> > + default n
> > + help
> > + It is a v4l2 driver and present in MediaTek MT8183 SoC.
> > + The driver supports scaling and color space conversion.
> > +
> > + To compile this driver as a module, choose M here: the
> > + module will be called mtk-mdp3.
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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply [flat|nested] 6+ messages in thread