[PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node

[PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node

[Andrew Davis]

J7200 has an instance of SA2UL in the MCU domain.
Add DT node for the same.

The device is marked TI_SCI_PD_SHARED as parts of this IP are also
shared with the security co-processor and OP-TEE.

The RNG node is added but marked disabled as it is firewalled off for
exclusive use by OP-TEE. Any access to this device from Linux will
result in firewall errors. We add the node for completeness of the
hardware description.

Signed-off-by: Andrew Davis <afd@ti.com>
---

Changes from v1:
 - Added comment in dtsi file
 - Added extra context to commit message

 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 1044ec6c4b0d4..a37280200c401 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -375,4 +375,24 @@ mcu_r5fss0_core1: r5f@41400000 {
 			ti,loczrama = <1>;
 		};
 	};
+
+	mcu_crypto: crypto@40900000 {
+		compatible = "ti,j721e-sa2ul";
+		reg = <0x00 0x40900000 0x00 0x1200>;
+		power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+		dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,
+		       <&mcu_udmap 0x7503>;
+		dma-names = "tx", "rx1", "rx2";
+		dma-coherent;
+
+		rng: rng@40910000 {
+			compatible = "inside-secure,safexcel-eip76";
+			reg = <0x00 0x40910000 0x00 0x7d>;
+			interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled"; /* Used by OP-TEE */
+		};
+	};
 };
-- 
2.36.1


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[PATCH v2 1/4] arm64: dts: ti: k3-am65-main: Disable RNG node

[Andrew Davis]

The hardware random number generator is used by OP-TEE and is access is
denied to other users with SoC level bus firewalls. Any access to this
device from Linux will result in firewall errors.

We could remove this node, but it is still valid device description,
and it is possible it could be re-enabled in the bootloader if OP-TEE
is not used. So only disable this node for now.

Signed-off-by: Andrew Davis <afd@ti.com>
---

Changes from v1:
 - Added comment in DT
 - Explained why it is only disabled in commit message

 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 8919fede3cd7..b3e714e1abed 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -127,6 +127,7 @@ rng: rng@4e10000 {
 			reg = <0x0 0x4e10000 0x0 0x7d>;
 			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&k3_clks 136 1>;
+			status = "disabled"; /* Used by OP-TEE */
 		};
 	};
 
-- 
2.36.1


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[PATCH v2 2/4] arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID

[Andrew Davis]

The first TX and first two RX PSI-L threads for SA2UL are used
by SYSFW on High Security(HS) devices. Use the next available
threads to prevent resource allocation conflicts.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index b3e714e1abed..165f53bd058b 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -117,8 +117,8 @@ crypto: crypto@4e00000 {
 		#size-cells = <2>;
 		ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
 
-		dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
-				<&main_udmap 0x4001>;
+		dmas = <&main_udmap 0xc001>, <&main_udmap 0x4002>,
+				<&main_udmap 0x4003>;
 		dma-names = "tx", "rx1", "rx2";
 		dma-coherent;
 
-- 
2.36.1


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[PATCH v2 3/4] arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL

[Andrew Davis]

The SA2UL hardware is also used by SYSFW and OP-TEE. It should be
requested using the shared TI-SCI flags instead of the exclusive
flags or the request will fail.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 165f53bd058b..4005a73cfea9 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -112,7 +112,7 @@ main_uart2: serial@2820000 {
 	crypto: crypto@4e00000 {
 		compatible = "ti,am654-sa2ul";
 		reg = <0x0 0x4e00000 0x0 0x1200>;
-		power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;
+		power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
-- 
2.36.1


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[PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node

[Andrew Davis]

J7200 has an instance of SA2UL in the MCU domain.
Add DT node for the same.

The device is marked TI_SCI_PD_SHARED as parts of this IP are also
shared with the security co-processor and OP-TEE.

The RNG node is added but marked disabled as it is firewalled off for
exclusive use by OP-TEE. Any access to this device from Linux will
result in firewall errors. We add the node for completeness of the
hardware description.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index ff13bbeed30c..e5be78a58682 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -375,4 +375,24 @@ mcu_r5fss0_core1: r5f@41400000 {
 			ti,loczrama = <1>;
 		};
 	};
+
+	mcu_crypto: crypto@40900000 {
+		compatible = "ti,j721e-sa2ul";
+		reg = <0x00 0x40900000 0x00 0x1200>;
+		power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+		dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,
+		       <&mcu_udmap 0x7503>;
+		dma-names = "tx", "rx1", "rx2";
+		dma-coherent;
+
+		rng: rng@40910000 {
+			compatible = "inside-secure,safexcel-eip76";
+			reg = <0x00 0x40910000 0x00 0x7d>;
+			interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled"; /* Used by OP-TEE */
+		};
+	};
 };
-- 
2.36.1


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Re: [PATCH v2 1/4] arm64: dts: ti: k3-am65-main: Disable RNG node

[Jayesh Choudhary]

On 23/08/22 05:41, Andrew Davis wrote:
> The hardware random number generator is used by OP-TEE and is access is
> denied to other users with SoC level bus firewalls. Any access to this
> device from Linux will result in firewall errors.
> 
> We could remove this node, but it is still valid device description,
> and it is possible it could be re-enabled in the bootloader if OP-TEE
> is not used. So only disable this node for now.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
> 
> Changes from v1:
>   - Added comment in DT
>   - Explained why it is only disabled in commit message
> 
>   arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index 8919fede3cd7..b3e714e1abed 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -127,6 +127,7 @@ rng: rng@4e10000 {
>   			reg = <0x0 0x4e10000 0x0 0x7d>;
>   			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&k3_clks 136 1>;
> +			status = "disabled"; /* Used by OP-TEE */
>   		};
>   	};
>   

Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>


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Re: [PATCH v2 2/4] arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID

[Jayesh Choudhary]

On 23/08/22 05:41, Andrew Davis wrote:
> The first TX and first two RX PSI-L threads for SA2UL are used
> by SYSFW on High Security(HS) devices. Use the next available
> threads to prevent resource allocation conflicts.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index b3e714e1abed..165f53bd058b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -117,8 +117,8 @@ crypto: crypto@4e00000 {
>   		#size-cells = <2>;
>   		ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
>   
> -		dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
> -				<&main_udmap 0x4001>;
> +		dmas = <&main_udmap 0xc001>, <&main_udmap 0x4002>,
> +				<&main_udmap 0x4003>;
>   		dma-names = "tx", "rx1", "rx2";
>   		dma-coherent;
>   

Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>


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Re: [PATCH v2 3/4] arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL

[Jayesh Choudhary]

On 23/08/22 05:41, Andrew Davis wrote:
> The SA2UL hardware is also used by SYSFW and OP-TEE. It should be
> requested using the shared TI-SCI flags instead of the exclusive
> flags or the request will fail.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index 165f53bd058b..4005a73cfea9 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -112,7 +112,7 @@ main_uart2: serial@2820000 {
>   	crypto: crypto@4e00000 {
>   		compatible = "ti,am654-sa2ul";
>   		reg = <0x0 0x4e00000 0x0 0x1200>;
> -		power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;
> +		power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
>   		#address-cells = <2>;
>   		#size-cells = <2>;
>   		ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;

Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>


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Re: [PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node

[Jayesh Choudhary]

On 23/08/22 05:41, Andrew Davis wrote:
> J7200 has an instance of SA2UL in the MCU domain.
> Add DT node for the same.
> 
> The device is marked TI_SCI_PD_SHARED as parts of this IP are also
> shared with the security co-processor and OP-TEE.
> 
> The RNG node is added but marked disabled as it is firewalled off for
> exclusive use by OP-TEE. Any access to this device from Linux will
> result in firewall errors. We add the node for completeness of the
> hardware description.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 20 +++++++++++++++++++
>   1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index ff13bbeed30c..e5be78a58682 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -375,4 +375,24 @@ mcu_r5fss0_core1: r5f@41400000 {
>   			ti,loczrama = <1>;
>   		};
>   	};
> +
> +	mcu_crypto: crypto@40900000 {
> +		compatible = "ti,j721e-sa2ul";
> +		reg = <0x00 0x40900000 0x00 0x1200>;
> +		power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
> +		dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,
> +		       <&mcu_udmap 0x7503>;
> +		dma-names = "tx", "rx1", "rx2";
> +		dma-coherent;
> +
> +		rng: rng@40910000 {
> +			compatible = "inside-secure,safexcel-eip76";
> +			reg = <0x00 0x40910000 0x00 0x7d>;
> +			interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled"; /* Used by OP-TEE */
> +		};
> +	};
>   };

Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>

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Re: [PATCH v2 1/4] arm64: dts: ti: k3-am65-main: Disable RNG node

[Vignesh Raghavendra]

Hi Andrew Davis,

On Mon, 22 Aug 2022 19:11:33 -0500, Andrew Davis wrote:
> The hardware random number generator is used by OP-TEE and is access is
> denied to other users with SoC level bus firewalls. Any access to this
> device from Linux will result in firewall errors.
> 
> We could remove this node, but it is still valid device description,
> and it is possible it could be re-enabled in the bootloader if OP-TEE
> is not used. So only disable this node for now.
> 
> [...]

I have applied the following to branch master on [1].
Thank you!

[1/4] arm64: dts: ti: k3-am65-main: Disable RNG node
      commit: 1ad4669b4bbe6b72784acdb5b24f72b22ad8f1d1
[2/4] arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID
      commit: 530eaa573a33fdd86725fdd2b979cbbbc539d47c
[3/4] arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL
      commit: 49611f43e035f30be685fcf7468f23e85ce2ee06
[4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
      commit: d683a73980a61cc5d8abea7f3f996028e64e9144

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh


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