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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: will@kernel.org, catalin.marinas@arm.com, maz@kernel.org,
	mark.rutland@arm.com, linux-efi@vger.kernel.org,
	keescook@chromium.org, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v3 4/7] arm64: head: avoid cache invalidation when entering with the MMU on
Date: Sat, 27 Aug 2022 17:58:49 +0200	[thread overview]
Message-ID: <20220827155852.3338551-5-ardb@kernel.org> (raw)
In-Reply-To: <20220827155852.3338551-1-ardb@kernel.org>

If we enter with the MMU on, there is no need for explicit cache
invalidation for stores to memory, as they will be coherent with the
caches.

Let's take advantage of this, and create the ID map with the MMU still
enabled if that is how we entered, and avoid any cache invalidation
calls in that case.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/head.S | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 8e26f2deb78b..4c5a5692c1e4 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -89,9 +89,9 @@
 SYM_CODE_START(primary_entry)
 	bl	record_mmu_state
 	bl	preserve_boot_args
+	bl	create_idmap
 	bl	init_kernel_el			// w0=cpu_boot_mode
 	mov	x20, x0
-	bl	create_idmap
 
 	/*
 	 * The following calls CPU setup code, see arch/arm64/mm/proc.S for
@@ -133,11 +133,13 @@ SYM_CODE_START_LOCAL(preserve_boot_args)
 	stp	x21, x1, [x0]			// x0 .. x3 at kernel entry
 	stp	x2, x3, [x0, #16]
 
+	cbnz	x19, 0f				// skip cache invalidation if MMU is on
 	dmb	sy				// needed before dc ivac with
 						// MMU off
 
 	add	x1, x0, #0x20			// 4 x 8 bytes
 	b	dcache_inval_poc		// tail call
+0:	ret
 SYM_CODE_END(preserve_boot_args)
 
 SYM_FUNC_START_LOCAL(clear_page_tables)
@@ -374,12 +376,13 @@ SYM_FUNC_START_LOCAL(create_idmap)
 	 * accesses (MMU disabled), invalidate those tables again to
 	 * remove any speculatively loaded cache lines.
 	 */
+	cbnz	x19, 0f				// skip cache invalidation if MMU is on
 	dmb	sy
 
 	adrp	x0, init_idmap_pg_dir
 	adrp	x1, init_idmap_pg_end
 	bl	dcache_inval_poc
-	ret	x28
+0:	ret	x28
 SYM_FUNC_END(create_idmap)
 
 SYM_FUNC_START_LOCAL(create_kernel_mapping)
-- 
2.35.1


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  parent reply	other threads:[~2022-08-27 16:01 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-27 15:58 [PATCH v3 0/7] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 1/7] arm64: lds: reduce effective minimum image alignment to 64k Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 2/7] arm64: kernel: move ID map out of .text mapping Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 3/7] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-08-27 15:58 ` Ard Biesheuvel [this message]
2022-08-27 15:58 ` [PATCH v3 5/7] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 6/7] arm64: efi/libstub: use EFI_LOADER_CODE region when moving the kernel in memory Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 7/7] arm64: efi/libstub: enter with the MMU on Ard Biesheuvel

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