From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: will@kernel.org, catalin.marinas@arm.com, maz@kernel.org,
mark.rutland@arm.com, linux-efi@vger.kernel.org,
keescook@chromium.org, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v3 5/7] arm64: head: clean the ID map page to the PoC
Date: Sat, 27 Aug 2022 17:58:50 +0200 [thread overview]
Message-ID: <20220827155852.3338551-6-ardb@kernel.org> (raw)
In-Reply-To: <20220827155852.3338551-1-ardb@kernel.org>
If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
to ensure that instruction and data accesses with the MMU off see the
correct data.
Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/kernel/head.S | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4c5a5692c1e4..c8862e4bc45e 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -70,7 +70,7 @@
__EFI_PE_HEADER
- __INIT
+ .section ".idmap.text","awx"
/*
* The following callee saved general purpose registers are used on the
@@ -90,6 +90,17 @@ SYM_CODE_START(primary_entry)
bl record_mmu_state
bl preserve_boot_args
bl create_idmap
+
+ /*
+ * If we entered with the MMU and caches on, clean the ID mapped part
+ * of the primary boot code to the PoC so we can safely execute it with
+ * the MMU off.
+ */
+ cbz x19, 0f
+ adrp x0, __idmap_text_start
+ adr_l x1, __idmap_text_end
+ bl dcache_clean_poc
+0:
bl init_kernel_el // w0=cpu_boot_mode
mov x20, x0
@@ -111,6 +122,7 @@ SYM_CODE_START(primary_entry)
b __primary_switch
SYM_CODE_END(primary_entry)
+ __INIT
SYM_CODE_START_LOCAL(record_mmu_state)
mrs x19, CurrentEL
cmp x19, #CurrentEL_EL2
--
2.35.1
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next prev parent reply other threads:[~2022-08-27 16:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-27 15:58 [PATCH v3 0/7] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 1/7] arm64: lds: reduce effective minimum image alignment to 64k Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 2/7] arm64: kernel: move ID map out of .text mapping Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 3/7] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 4/7] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-08-27 15:58 ` Ard Biesheuvel [this message]
2022-08-27 15:58 ` [PATCH v3 6/7] arm64: efi/libstub: use EFI_LOADER_CODE region when moving the kernel in memory Ard Biesheuvel
2022-08-27 15:58 ` [PATCH v3 7/7] arm64: efi/libstub: enter with the MMU on Ard Biesheuvel
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