* [RFC PATCH v3 1/4] dt-bindings: net: can: add STM32 bxcan DT bindings
2022-08-28 13:33 [RFC PATCH v3 0/4] can: bxcan: add support for ST bxCAN controller Dario Binacchi
@ 2022-08-28 13:33 ` Dario Binacchi
2022-08-31 22:06 ` Rob Herring
2022-08-28 13:33 ` [RFC PATCH v3 2/4] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi
2022-08-28 13:33 ` [RFC PATCH v3 3/4] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi
2 siblings, 1 reply; 5+ messages in thread
From: Dario Binacchi @ 2022-08-28 13:33 UTC (permalink / raw)
To: linux-kernel
Cc: Marc Kleine-Budde, Alexandre Torgue, michael, Amarula patchwork,
Vincent Mailhol, Krzysztof Kozlowski, Rob Herring, Dario Binacchi,
David S. Miller, Eric Dumazet, Jakub Kicinski,
Krzysztof Kozlowski, Maxime Coquelin, Paolo Abeni, Rob Herring,
Wolfgang Grandegger, devicetree, linux-arm-kernel, linux-can,
linux-stm32, netdev
Add documentation of device tree bindings for the STM32 basic extended
CAN (bxcan) controller.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Add description to the parent of the two child nodes.
- Move "patterProperties:" after "properties: in top level before "required".
- Add "clocks" to the "required:" list of the child nodes.
Changes in v2:
- Change the file name into 'st,stm32-bxcan-core.yaml'.
- Rename compatibles:
- st,stm32-bxcan-core -> st,stm32f4-bxcan-core
- st,stm32-bxcan -> st,stm32f4-bxcan
- Rename master property to st,can-master.
- Remove the status property from the example.
- Put the node child properties as required.
.../bindings/net/can/st,stm32-bxcan.yaml | 142 ++++++++++++++++++
1 file changed, 142 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
new file mode 100644
index 000000000000..3278c724e6f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics bxCAN controller
+
+description: STMicroelectronics BxCAN controller for CAN bus
+
+maintainers:
+ - Dario Binacchi <dario.binacchi@amarulasolutions.com>
+
+allOf:
+ - $ref: can-controller.yaml#
+
+properties:
+ compatible:
+ description:
+ It manages the access to the 512-bytes SRAM memory shared by the
+ two bxCAN cells (CAN1 master and CAN2 slave) in dual CAN peripheral
+ configuration.
+ enum:
+ - st,stm32f4-bxcan-core
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ clocks:
+ description:
+ Input clock for registers access
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ "^can@[0-9]+$":
+ type: object
+ description:
+ A CAN block node contains two subnodes, representing each one a CAN
+ instance available on the machine.
+
+ properties:
+ compatible:
+ enum:
+ - st,stm32f4-bxcan
+
+ st,can-master:
+ description:
+ Master and slave mode of the bxCAN peripheral is only relevant
+ if the chip has two CAN peripherals. In that case they share
+ some of the required logic, and that means you cannot use the
+ slave CAN without the master CAN.
+ type: boolean
+
+ reg:
+ description: |
+ Offset of CAN instance in CAN block. Valid values are:
+ - 0x0: CAN1
+ - 0x400: CAN2
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: transmit interrupt
+ - description: FIFO 0 receive interrupt
+ - description: FIFO 1 receive interrupt
+ - description: status change error interrupt
+
+ interrupt-names:
+ items:
+ - const: tx
+ - const: rx0
+ - const: rx1
+ - const: sce
+
+ resets:
+ maxItems: 1
+
+ clocks:
+ description:
+ Input clock for registers access
+ maxItems: 1
+
+ additionalProperties: false
+
+ required:
+ - compatible
+ - reg
+ - interrupts
+ - resets
+ - clocks
+
+required:
+ - compatible
+ - reg
+ - resets
+ - clocks
+ - '#address-cells'
+ - '#size-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/stm32fx-clock.h>
+ #include <dt-bindings/mfd/stm32f4-rcc.h>
+
+ can: can@40006400 {
+ compatible = "st,stm32f4-bxcan-core";
+ reg = <0x40006400 0x800>;
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ can1: can@0 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x0>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ st,can-master;
+ };
+
+ can2: can@400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x400>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+ };
+ };
--
2.32.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [RFC PATCH v3 1/4] dt-bindings: net: can: add STM32 bxcan DT bindings
2022-08-28 13:33 ` [RFC PATCH v3 1/4] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi
@ 2022-08-31 22:06 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2022-08-31 22:06 UTC (permalink / raw)
To: Dario Binacchi
Cc: linux-kernel, Marc Kleine-Budde, Alexandre Torgue, michael,
Amarula patchwork, Vincent Mailhol, Krzysztof Kozlowski,
David S. Miller, Eric Dumazet, Jakub Kicinski,
Krzysztof Kozlowski, Maxime Coquelin, Paolo Abeni,
Wolfgang Grandegger, devicetree, linux-arm-kernel, linux-can,
linux-stm32, netdev
On Sun, Aug 28, 2022 at 03:33:26PM +0200, Dario Binacchi wrote:
> Add documentation of device tree bindings for the STM32 basic extended
> CAN (bxcan) controller.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>
> ---
>
> Changes in v3:
> - Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
> - Add description to the parent of the two child nodes.
> - Move "patterProperties:" after "properties: in top level before "required".
> - Add "clocks" to the "required:" list of the child nodes.
>
> Changes in v2:
> - Change the file name into 'st,stm32-bxcan-core.yaml'.
> - Rename compatibles:
> - st,stm32-bxcan-core -> st,stm32f4-bxcan-core
> - st,stm32-bxcan -> st,stm32f4-bxcan
> - Rename master property to st,can-master.
> - Remove the status property from the example.
> - Put the node child properties as required.
>
> .../bindings/net/can/st,stm32-bxcan.yaml | 142 ++++++++++++++++++
> 1 file changed, 142 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
> new file mode 100644
> index 000000000000..3278c724e6f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics bxCAN controller
> +
> +description: STMicroelectronics BxCAN controller for CAN bus
> +
> +maintainers:
> + - Dario Binacchi <dario.binacchi@amarulasolutions.com>
> +
> +allOf:
> + - $ref: can-controller.yaml#
> +
> +properties:
> + compatible:
> + description:
> + It manages the access to the 512-bytes SRAM memory shared by the
> + two bxCAN cells (CAN1 master and CAN2 slave) in dual CAN peripheral
> + configuration.
> + enum:
> + - st,stm32f4-bxcan-core
> +
> + reg:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + clocks:
> + description:
> + Input clock for registers access
> + maxItems: 1
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> +patternProperties:
> + "^can@[0-9]+$":
> + type: object
> + description:
> + A CAN block node contains two subnodes, representing each one a CAN
> + instance available on the machine.
> +
> + properties:
> + compatible:
> + enum:
> + - st,stm32f4-bxcan
> +
> + st,can-master:
> + description:
> + Master and slave mode of the bxCAN peripheral is only relevant
> + if the chip has two CAN peripherals. In that case they share
> + some of the required logic, and that means you cannot use the
> + slave CAN without the master CAN.
> + type: boolean
> +
> + reg:
> + description: |
> + Offset of CAN instance in CAN block. Valid values are:
> + - 0x0: CAN1
> + - 0x400: CAN2
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: transmit interrupt
> + - description: FIFO 0 receive interrupt
> + - description: FIFO 1 receive interrupt
> + - description: status change error interrupt
> +
> + interrupt-names:
> + items:
> + - const: tx
> + - const: rx0
> + - const: rx1
> + - const: sce
> +
> + resets:
> + maxItems: 1
> +
> + clocks:
> + description:
> + Input clock for registers access
> + maxItems: 1
> +
> + additionalProperties: false
> +
> + required:
> + - compatible
> + - reg
> + - interrupts
> + - resets
> + - clocks
> +
> +required:
> + - compatible
> + - reg
> + - resets
> + - clocks
> + - '#address-cells'
> + - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/stm32fx-clock.h>
> + #include <dt-bindings/mfd/stm32f4-rcc.h>
> +
> + can: can@40006400 {
> + compatible = "st,stm32f4-bxcan-core";
> + reg = <0x40006400 0x800>;
> + resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
> + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
> + #address-cells = <1>;
> + #size-cells = <0>;
Again, the addressing is not correct here if 0 and 0x400 are memory
mapped register offsets.
Rob
> +
> + can1: can@0 {
> + compatible = "st,stm32f4-bxcan";
> + reg = <0x0>;
> + interrupts = <19>, <20>, <21>, <22>;
> + interrupt-names = "tx", "rx0", "rx1", "sce";
> + resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
> + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
> + st,can-master;
> + };
> +
> + can2: can@400 {
> + compatible = "st,stm32f4-bxcan";
> + reg = <0x400>;
> + interrupts = <63>, <64>, <65>, <66>;
> + interrupt-names = "tx", "rx0", "rx1", "sce";
> + resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
> + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
> + };
> + };
> --
> 2.32.0
>
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [RFC PATCH v3 2/4] ARM: dts: stm32: add CAN support on stm32f429
2022-08-28 13:33 [RFC PATCH v3 0/4] can: bxcan: add support for ST bxCAN controller Dario Binacchi
2022-08-28 13:33 ` [RFC PATCH v3 1/4] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi
@ 2022-08-28 13:33 ` Dario Binacchi
2022-08-28 13:33 ` [RFC PATCH v3 3/4] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi
2 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2022-08-28 13:33 UTC (permalink / raw)
To: linux-kernel
Cc: Marc Kleine-Budde, Alexandre Torgue, michael, Amarula patchwork,
Vincent Mailhol, Krzysztof Kozlowski, Rob Herring, Dario Binacchi,
Krzysztof Kozlowski, Maxime Coquelin, Rob Herring, devicetree,
linux-arm-kernel, linux-stm32
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the master and CAN2 the slave,
that share some of the required logic like clock and filters. This means
that the slave CAN can't be used without the master CAN.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Add "clocks" to can@0 node.
arch/arm/boot/dts/stm32f429.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index c31ceb821231..e04cf73a8caa 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -362,6 +362,37 @@ i2c3: i2c@40005c00 {
status = "disabled";
};
+ can: can@40006400 {
+ compatible = "st,stm32f4-bxcan-core";
+ reg = <0x40006400 0x800>;
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ can1: can@0 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x0>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ st,can-master;
+ status = "disabled";
+ };
+
+ can2: can@400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x400>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+ status = "disabled";
+ };
+ };
+
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
--
2.32.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [RFC PATCH v3 3/4] ARM: dts: stm32: add pin map for CAN controller on stm32f4
2022-08-28 13:33 [RFC PATCH v3 0/4] can: bxcan: add support for ST bxCAN controller Dario Binacchi
2022-08-28 13:33 ` [RFC PATCH v3 1/4] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi
2022-08-28 13:33 ` [RFC PATCH v3 2/4] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi
@ 2022-08-28 13:33 ` Dario Binacchi
2 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2022-08-28 13:33 UTC (permalink / raw)
To: linux-kernel
Cc: Marc Kleine-Budde, Alexandre Torgue, michael, Amarula patchwork,
Vincent Mailhol, Krzysztof Kozlowski, Rob Herring, Dario Binacchi,
Krzysztof Kozlowski, Maxime Coquelin, Rob Herring, devicetree,
linux-arm-kernel, linux-stm32
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Remove a blank line.
Changes in v2:
- Remove a blank line.
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 500bcc302d42..8a4d51f97248 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -448,6 +448,36 @@ pins2 {
slew-rate = <2>;
};
};
+
+ can1_pins_a: can1-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+ };
+ };
+
+ can2_pins_a: can2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
+
+ can2_pins_b: can2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
};
};
};
--
2.32.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread