From: Stephen Boyd <sboyd@kernel.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
mturquette@baylibre.com
Cc: matthias.bgg@gmail.com, p.zabel@pengutronix.de,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
angelogioacchino.delregno@collabora.com, wenst@chromium.org,
chun-jie.chen@mediatek.com, miles.chen@mediatek.com,
rex-bc.chen@mediatek.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1
Date: Wed, 31 Aug 2022 18:14:21 -0700 [thread overview]
Message-ID: <20220901011423.604D8C433D6@smtp.kernel.org> (raw)
In-Reply-To: <20220629105205.173471-3-angelogioacchino.delregno@collabora.com>
Quoting AngeloGioacchino Del Regno (2022-06-29 03:52:05)
> Add the reset idx for PCIe P0, P1, located in infra_ao RST2 registers.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
Applied to clk-next
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prev parent reply other threads:[~2022-09-01 1:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-29 10:52 [PATCH 0/2] MT8195: Add resets for PCIe controllers AngeloGioacchino Del Regno
2022-06-29 10:52 ` [PATCH 1/2] dt-bindings: reset: mt8195: Add resets for PCIE controllers AngeloGioacchino Del Regno
2022-06-29 11:46 ` Krzysztof Kozlowski
2022-09-01 1:14 ` Stephen Boyd
2022-06-29 10:52 ` [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1 AngeloGioacchino Del Regno
2022-09-01 1:14 ` Stephen Boyd [this message]
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