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[2.205.66.233]) by smtp.googlemail.com with ESMTPSA id gz28-20020a170907a05c00b0072b92daef1csm4095170ejc.146.2022.09.04.12.30.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Sep 2022 12:30:28 -0700 (PDT) From: Jeungwoo Yoo To: Catalin Marinas , Will Deacon Cc: Hyeonggon Yoo <42.hyeyoo@gmail.com>, Gwan-gyeong Mun , Sangyun Kim , Jeungwoo Yoo , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: Remove d-cache clean operation at preserve_boot_args(). Date: Sun, 4 Sep 2022 21:30:19 +0200 Message-Id: <20220904193020.65556-1-casionwoo@gmail.com> X-Mailer: git-send-email 2.34.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220904_123031_679581_6994C759 X-CRM114-Status: GOOD ( 16.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Kernel expects only the clean operation as a booting requirement in arm64 architecture [1], therefore, the kernel has to invalidate any cache entries after accessing a memory in the booting time (before enabling D-cache and MMU) not to overwrite the memory with the stale cache entry. Same applied in preserve_boot_args(), kernel saves boot arguments into 'boot_args' and invalidates the corresponding cache entry. However, according to the 'dcache_inval_poc()' implementation, the cache entry will be not only invalidated but also cleaned. That means if there is a stale cache entry corresponding to the address of the 'boot_args', the saved boot arguments in 'boot_args' will be overwritten by the stale cache entry. Therefore, it uses 'dv ivac' instruction directly instead of calling 'dcache_inval_poc()'. The address of the 'boot_args' is aligned to the cache line size and the size of 'boot_args' is 32 byte (8 byte * 4), therefore, a single invalidate operation is enough to invalidate the cache line belonging to the 'boot_args'. Sometimes clean operation is required not to lose any contents in the cache entry but not the target of the invalidation. However, in this case, there is no valid cache entries at a very early booting stage and preserve_boot_args() is not called by any other (non-primary) CPUs. Therefore, this invalidation operation will not introduce any problems. [1] in Documentation/arm64/booting.rst: The address range corresponding to the loaded kernel image must be cleaned to the PoC. Co-developed-by: Gwan-gyeong Mun Signed-off-by: Gwan-gyeong Mun Co-developed-by: Sangyun Kim Signed-off-by: Sangyun Kim Signed-off-by: Jeungwoo Yoo --- arch/arm64/kernel/head.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index cefe6a73ee54..916227666b07 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -121,9 +121,7 @@ SYM_CODE_START_LOCAL(preserve_boot_args) dmb sy // needed before dc ivac with // MMU off - - add x1, x0, #0x20 // 4 x 8 bytes - b dcache_inval_poc // tail call + dc ivac, x0 // Invalidate potentially stale cache line SYM_CODE_END(preserve_boot_args) SYM_FUNC_START_LOCAL(clear_page_tables) -- 2.34.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel