From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 308D2C54EE9 for ; Thu, 8 Sep 2022 13:36:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=a3vcf8dJ0c2xh0VGtwiQXO68MULK6hdnK0zecDU3jy8=; b=Fjg5eWfkZDuqA3 Sflr8o2dz9CW4gZXulWWWngJ/SqxTaLv/X6tOVheBPuzLeI3ZXmmOd14t3XdtIAaC5EJ6eda0bhyI uRVrwi8/2qdC0OKRyy50OuQILwApUD9N1Q40t4W9Pwv9c5E2PZ6QWXSzI0061ozP6Y1lD9Gw1B2AO /u3UNw3iSaxS0HPJNJKUknr+hoI98NM1viNNqTm/sDARiGziP1ySVkQjGMvLbhOj3jCfiDjQCmZ2a hVbFz1a0Trx14RBRS0TkExl3jctMLRxBQHxktun303gpxMDcctYKkTF6ljLJdC/LqmLhCdAHmqm0w tacVeMZU0fTUoois/nYA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWHgf-003vPp-BC; Thu, 08 Sep 2022 13:35:22 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWHe8-003tTg-Kr for linux-arm-kernel@lists.infradead.org; Thu, 08 Sep 2022 13:32:46 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C941961D08; Thu, 8 Sep 2022 13:32:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED633C433D6; Thu, 8 Sep 2022 13:32:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662643963; bh=4zqf8JKI4lhMW+l4mMd0teP/mgRg6TgVM3eCusEoGOU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mbebcjCYTZJOepxdQqeiSCDEJGusBiIkPJ8g1R5CyWen41rYC06DG21b5qCZvS8bU a273R3AON18PoAtGErx1LOQd35IM7v9uPm4Sr7JrHphPIv0fKwBcWWk/IWFCtR8DpD FdvFZ2tvs9RZDL7K32zBRTqBbNm47kFyIVbChhFjts23LZ5YPXaM2Ij/OYudwEHUg1 YhXoUhazNUpAeByDJw8D4RCBww1wwPXlPmHkqVfgV1bF97PDN7wbtdmtKJ1/DtyU3p MPJwTjRjXNbQLBDz2GqfHamA0dfn31AuxZxyj/pZ6xGWZYH4dVh0s6Yy940MBszfwh cwkGp/xrRvADg== Date: Thu, 8 Sep 2022 14:32:38 +0100 From: Will Deacon To: Catalin Marinas Cc: Robin Murphy , Christoph Hellwig , linux-arm-kernel@lists.infradead.org, Mark Rutland , Ard Biesheuvel Subject: Re: [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() Message-ID: <20220908133237.GA31677@willie-the-truck> References: <20220823122111.17439-1-will@kernel.org> <20220907090305.GA30704@lst.de> <5d856574-4cd7-70d0-adcb-3e284fef315f@arm.com> <20220907162543.GA30558@willie-the-truck> <6dfd53a1-ce24-086d-1ce6-093d48b033da@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220908_063244_742803_B5B2E5A0 X-CRM114-Status: GOOD ( 23.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 08, 2022 at 02:27:19PM +0100, Catalin Marinas wrote: > On Thu, Sep 08, 2022 at 02:02:13PM +0100, Catalin Marinas wrote: > > On Thu, Sep 08, 2022 at 12:32:42PM +0100, Robin Murphy wrote: > > > On 2022-09-08 11:32, Catalin Marinas wrote: > > > > The architecture requires invalidate or clean while also stating that > > > > clean+invalidate can be used instead, so I don't think there's much to > > > > justify. From the mismatched attributes section: > > > > > > > > 1. If the mismatched attributes for a memory location all assign the > > > > same shareability attribute to a Location that has a cacheable > > > > attribute, > > > > > > This is not describing our case, though. We do have a cacheable attribute in > > > at least one alias, but the shareability is *not* the same across all > > > aliases, therefore at face value it clearly does not apply. > > > > From the CPU perspective, both the cacheable and non-cacheable aliases > > have the same inner shareable attribute. The device accessing the buffer > > presumably should use the same shareability attributes. In the worst > > case it's outer shareable but on most implementations the inner and > > outer shareability domains are the same. > > Ah, so you are referring to this paragraph: > > The shareability field is only relevant if the memory is a Normal > Cacheable memory type. All Device and Normal Non-cacheable memory > regions are always treated as Outer Shareable, regardless of the > translation table shareability attributes. FWIW, I've never understood what this paragraph means for the shareability of something like an inner-cacheable, outer-non-cacheable mapping. *shrug* Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel