From: Will Deacon <will@kernel.org>
To: Mark Zhang <markzhang@nvidia.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Suresh Warrier <sureshw@nvidia.com>,
linux-arm-kernel@lists.infradead.org,
Yishai Hadas <yishaih@nvidia.com>,
Jason Gunthorpe <jgg@nvidia.com>,
Maor Gottlieb <maorg@nvidia.com>,
Leon Romanovsky <leonro@nvidia.com>,
Michael Guralnik <michaelgur@nvidia.com>,
Michael Berezin <michaelbe@nvidia.com>,
yong.xu@arm.com, Eran Ben Elisha <eranbe@nvidia.com>
Subject: Re: Should we use "dsb" or "dmb" between write to buffer and write to register
Date: Tue, 13 Sep 2022 12:11:52 +0100 [thread overview]
Message-ID: <20220913111152.GB3752@willie-the-truck> (raw)
In-Reply-To: <aba32328-3a50-4383-9cf0-7dd8c24fd6da@nvidia.com>
On Mon, Sep 12, 2022 at 04:43:14PM +0800, Mark Zhang wrote:
> However my colleague Suresh still has some concerns:
> "I believe the effect of the write64() here is to trigger a side effect in
> the device (that it is not a true write to memory although it is a memory
> access and so the NIC is not actually reading this memory address). If that
> is the case, a dsb is likely needed to guarantee that the effects of the
> memcpy are also observed by the NIC. You can check out some examples in
> Appendix K11 (Barrier Litmus Tests ) of the Arm ARM – for instance K11.4 and
> K11.5.4, where a dsb is used for these kinds of scenarios.
> ... There is a subtle difference between observing the execution of an
> instruction and observing the completion of an instruction"
A DSB is required in the general case to deal with private peripherals,
but these are pretty rare in practice and generally MMIO regions are going
to be shared between CPUs.
> What do you think?
I think a DMB is sufficient to ensure ordering (and so a DSB will work too,
but with much greater performance impact). If you actually want to cause the
device to change state before issuing the writes to memory, then even a DSB
is not enough -- you likely also want something like a read-back from a
status register and that sequence is device specific.
Will
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next prev parent reply other threads:[~2022-09-13 11:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 7:53 Should we use "dsb" or "dmb" between write to buffer and write to register Mark Zhang
2022-09-07 17:53 ` Catalin Marinas
2022-09-08 13:50 ` Will Deacon
2022-09-12 8:43 ` Mark Zhang
2022-09-13 11:11 ` Will Deacon [this message]
2022-09-12 18:16 ` Catalin Marinas
2022-09-13 11:06 ` Will Deacon
2022-09-14 17:29 ` Catalin Marinas
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