[PATCH v2 2/9] arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes

Li Yang
2022-09-15T23:36:25Z

From: Xiaowei Bao <xiaowei.bao@nxp.com>

Add the PME interrupt porperty and big-endian property in PCIe EP nodes.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index ddae3cb0a977..8002d83b341b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -813,8 +813,11 @@ pcie_ep1: pcie_ep@3400000 {
reg = <0x00 0x03400000 0x0 0x00100000>,
<0x40 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme";
num-ib-windows = <6>;
num-ob-windows = <8>;
+ big-endian;
status = "disabled";
};

@@ -849,8 +852,11 @@ pcie_ep2: pcie_ep@3500000 {
reg = <0x00 0x03500000 0x0 0x00100000>,
<0x48 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space";
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme";
num-ib-windows = <6>;
num-ob-windows = <8>;
+ big-endian;
status = "disabled";
};

@@ -885,8 +891,11 @@ pcie_ep3: pcie_ep@3600000 {
reg = <0x00 0x03600000 0x0 0x00100000>,
<0x50 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space";
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme";
num-ib-windows = <6>;
num-ob-windows = <8>;
+ big-endian;
status = "disabled";
};