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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id l9-20020a056870204900b00127a6357bd5sm3353805oad.49.2022.09.16.11.44.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 11:44:52 -0700 (PDT) Received: (nullmailer pid 1054596 invoked by uid 1000); Fri, 16 Sep 2022 18:44:51 -0000 Date: Fri, 16 Sep 2022 13:44:51 -0500 From: Rob Herring To: Serge Semin Cc: Serge Semin , Krzysztof Kozlowski , Robert Richter , Michal Simek , Rob Herring , linux-edac@vger.kernel.org, Manish Narani , Krzysztof Kozlowski , Mauro Carvalho Chehab , devicetree@vger.kernel.org, Punnaiah Choudary Kalluri , Pavel Parkhomenko , Michail Ivanov , linux-arm-kernel@lists.infradead.org, Dinh Nguyen , Borislav Petkov , Alexey Malahov , Tony Luck , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, James Morse Subject: Re: [PATCH v2 14/19] dt-bindings: memory: snps: Detach Zynq DDRC controller support Message-ID: <20220916184451.GA1054535-robh@kernel.org> References: <20220910194237.10142-1-Sergey.Semin@baikalelectronics.ru> <20220910194237.10142-15-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220910194237.10142-15-Sergey.Semin@baikalelectronics.ru> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220916_114455_123879_1740E8BA X-CRM114-Status: GOOD ( 14.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 10 Sep 2022 22:42:32 +0300, Serge Semin wrote: > The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC: > the CSRs layout is absolutely different and it doesn't support IRQs unlike > DW uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there > is no any reason to have these controllers described in the same bindings. > Let's split the DT-schema up. > > Note since the synopsys,ddrc-ecc.yaml schema describes the Synopsys DW > uMCTL2 DDR controller only, we need to accordingly fix the device > descriptions. > > Signed-off-by: Serge Semin > > --- > > Changelog v2: > - Move Synopsys DW uMCTL2 DDRC bindings file renaming to a separate > patch. (@Krzysztof) > --- > .../memory-controllers/synopsys,ddrc-ecc.yaml | 63 ++++++------------- > .../xlnx,zynq-ddrc-a05.yaml | 38 +++++++++++ > MAINTAINERS | 1 + > 3 files changed, 59 insertions(+), 43 deletions(-) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml > Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel