From: Matt Ranostay <mranostay@ti.com>
To: <vigneshr@ti.com>, <nm@ti.com>, <robh+dt@kernel.org>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 8/9] arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node
Date: Tue, 20 Sep 2022 20:13:26 -0700 [thread overview]
Message-ID: <20220921031327.4135-9-mranostay@ti.com> (raw)
In-Reply-To: <20220921031327.4135-1-mranostay@ti.com>
From: Aswath Govindraju <a-govindraju@ti.com>
Add PCIe device tree node (both RC and EP) for the single PCIe
instance present in j721s2.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 61 ++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index a4260ffb75c7..fc4cf8b4a28b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -781,6 +781,67 @@ serdes0: serdes@5060000 {
};
};
+ pcie1_rc: pcie@2910000 {
+ compatible = "ti,j7200-pcie-host", "ti,j721e-pcie-host";
+ reg = <0x00 0x02910000 0x00 0x1000>,
+ <0x00 0x02917000 0x00 0x400>,
+ <0x00 0x0d800000 0x00 0x00800000>,
+ <0x00 0x18000000 0x00 0x00001000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
+ max-link-speed = <3>;
+ num-lanes = <4>;
+ power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 276 41>;
+ clock-names = "fck";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xff>;
+ vendor-id = <0x104c>;
+ device-id = <0xb013>;
+ msi-map = <0x0 &gic_its 0x0 0x10000>;
+ dma-coherent;
+ ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
+ <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>;
+ dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
+ <0 0 0 2 &pcie1_intc 0>, /* INT B */
+ <0 0 0 3 &pcie1_intc 0>, /* INT C */
+ <0 0 0 4 &pcie1_intc 0>; /* INT D */
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 324 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ pcie1_ep: pcie-ep@2910000 {
+ compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep";
+ reg = <0x00 0x02910000 0x00 0x1000>,
+ <0x00 0x02917000 0x00 0x400>,
+ <0x00 0x0d800000 0x00 0x00800000>,
+ <0x00 0x18000000 0x00 0x08000000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "mem";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
+ max-link-speed = <3>;
+ num-lanes = <4>;
+ power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 276 41>;
+ clock-names = "fck";
+ max-functions = /bits/ 8 <6>;
+ max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
+ dma-coherent;
+ };
+
main_mcan0: can@2701000 {
compatible = "bosch,m_can";
reg = <0x00 0x02701000 0x00 0x200>,
--
2.37.2
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next prev parent reply other threads:[~2022-09-21 3:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 3:13 [PATCH v3 0/9] J721S2: Add support for additional IPs Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 1/9] arm64: dts: ti: k3-j721s2-main: Add support for USB Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 2/9] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 3/9] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 4/9] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 5/9] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 6/9] arm64: dts: ti: k3-j721s2: Add support for OSPI Flashes Matt Ranostay
2022-09-21 3:13 ` [PATCH v3 7/9] dt-bindings: PCI: Add host mode device-id for j721s2 platform Matt Ranostay
2022-09-26 20:19 ` Rob Herring
2022-09-21 3:13 ` Matt Ranostay [this message]
2022-09-21 3:13 ` [PATCH v3 9/9] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Matt Ranostay
2022-10-28 2:16 ` [PATCH v3 0/9] J721S2: Add support for additional IPs Nishanth Menon
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