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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 13, 2022 at 11:34:54AM +0800, Liao Chang wrote: > Single-step slot would not be used until kprobe is enabled, that means > no race condition occurs on it under SMP, hence it is safe to pacth ss > slot without stopping machine. > > Signed-off-by: Liao Chang > --- > arch/arm64/kernel/probes/kprobes.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c > index d1d182320245..5902e33fd3b6 100644 > --- a/arch/arm64/kernel/probes/kprobes.c > +++ b/arch/arm64/kernel/probes/kprobes.c > @@ -44,11 +44,10 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *); > static void __kprobes arch_prepare_ss_slot(struct kprobe *p) > { > kprobe_opcode_t *addr = p->ainsn.api.insn; > - void *addrs[] = {addr, addr + 1}; > - u32 insns[] = {p->opcode, BRK64_OPCODE_KPROBES_SS}; > > /* prepare insn slot */ > - aarch64_insn_patch_text(addrs, insns, 2); > + aarch64_insn_write(addr, p->opcode); > + aarch64_insn_write(addr + 1, BRK64_OPCODE_KPROBES_SS); > > flush_icache_range((uintptr_t)addr, (uintptr_t)(addr + MAX_INSN_SIZE)); Hmm, so it looks like prior to your change we were doing the cache maintebnance twice: once in aarch64_insn_patch_text() from stop machine context and then again in the flush_icache_range() call above. I suppose the cleanest thing would be to drop the flush_icache_range() call and then use aarch64_insn_patch_text_nosync() instead of aarch64_insn_write() in your change. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel