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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id r35-20020a056870582300b0011f22e74d5fsm3756563oap.20.2022.10.04.08.09.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 08:09:30 -0700 (PDT) Received: (nullmailer pid 1507385 invoked by uid 1000); Tue, 04 Oct 2022 15:09:29 -0000 Date: Tue, 4 Oct 2022 10:09:29 -0500 From: Rob Herring To: Frank Wunderlich Cc: linux-rockchip@lists.infradead.org, Frank Wunderlich , Kishon Vijay Abraham I , Vinod Koul , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Yifeng Zhao , Johan Jonker , Peter Geis , Simon Xue , Liang Chen , Shawn Lin , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: Re: [PATCH v5 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Message-ID: <20221004150929.GA1506199-robh@kernel.org> References: <20220825193836.54262-1-linux@fw-web.de> <20220825193836.54262-2-linux@fw-web.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220825193836.54262-2-linux@fw-web.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221004_080941_219668_93514473 X-CRM114-Status: GOOD ( 22.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 25, 2022 at 09:38:32PM +0200, Frank Wunderlich wrote: > From: Frank Wunderlich > > Add a new binding file for Rockchip PCIe v3 phy driver. > > Signed-off-by: Frank Wunderlich > Reviewed-by: Krzysztof Kozlowski > --- > v4: > - add reviewed-by > - remove minitems for clock-names as i have static list to fix error > - fix reg error by using 32-bit adressing in binding example > - change lane-map to u32 data-lanes > - tried to move data-lanes to phy-provider > https://github.com/frank-w/dt-schema/blob/main/dtschema/schemas/phy/phy-provider.yaml#L17 > cloned and installed via pip install -e > verified with pip show, but phy-privider seems not to be applied > > v3: > - drop quotes > - drop rk3588 > - make clockcount fixed to 3 > - full path for binding header file > - drop phy-mode and its header and add lane-map > > v2: > dt-bindings: rename yaml for PCIe v3 > rockchip-pcie3-phy.yaml => rockchip,pcie3-phy.yaml > > changes in pcie3 phy yaml > - change clock names to ordered const list > - extend pcie30-phymode description > - add phy-cells to required properties > - drop unevaluatedProperties > - example with 1 clock each line > - use default property instead of text describing it > - update license > --- > .../bindings/phy/rockchip,pcie3-phy.yaml | 80 +++++++++++++++++++ > 1 file changed, 80 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > new file mode 100644 > index 000000000000..9f2d8d2cc7a5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > @@ -0,0 +1,80 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip PCIe v3 phy > + > +maintainers: > + - Heiko Stuebner > + > +properties: > + compatible: > + enum: > + - rockchip,rk3568-pcie3-phy The driver also has 'rockchip,rk3588-pcie3-phy'. Please send a fix adding it here or removing from the driver. Are they not compatible with each other? Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel