[PATCH 00/10] AM64x Disable Incomplete DT Nodes

[PATCH 00/10] AM64x Disable Incomplete DT Nodes

[Andrew Davis]

Hello all,

This series goes through the AM64x dtsi and disables the set of nodes
that are not functional without additional board level information.
This is usually pinmux data, but can also be inernal device resources.

Only when the node is completed in the board file should the node be
enabled. This helps prevents nodes that represent IP that are not
pinned-out on a given board from being left enabled.

This also reduces the effort needed to add a new board, one no longer
needs to manually disable all the extra IP. For instance TI J784s4 has
20(!) MCAN instances. It is much easier to enable the one you pin out,
vs disabling the 19 that you did not.

Thanks,
Andrew

Andrew Davis (10):
  arm64: dts: ti: k3-am64: Enable UART nodes at the board level
  arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
  arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
  arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
  arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
  arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
  arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
  arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
  arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
  arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level

 arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  37 ++++++
 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  |   6 +
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 119 ++-----------------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 142 ++---------------------
 4 files changed, 63 insertions(+), 241 deletions(-)

-- 
2.37.3


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[PATCH 01/10] arm64: dts: ti: k3-am64: Enable UART nodes at the board level

[Andrew Davis]

UART nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the UART nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  7 ++++++
 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  |  2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 29 +-----------------------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 29 +-----------------------
 4 files changed, 11 insertions(+), 56 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index d6aa23681bbe..a115c668d001 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -237,6 +237,7 @@ main_uart0: serial@2800000 {
 		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 146 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart1: serial@2810000 {
@@ -248,6 +249,7 @@ main_uart1: serial@2810000 {
 		power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 152 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart2: serial@2820000 {
@@ -259,6 +261,7 @@ main_uart2: serial@2820000 {
 		power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 153 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart3: serial@2830000 {
@@ -270,6 +273,7 @@ main_uart3: serial@2830000 {
 		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 154 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart4: serial@2840000 {
@@ -281,6 +285,7 @@ main_uart4: serial@2840000 {
 		power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 155 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart5: serial@2850000 {
@@ -292,6 +297,7 @@ main_uart5: serial@2850000 {
 		power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 156 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart6: serial@2860000 {
@@ -303,6 +309,7 @@ main_uart6: serial@2860000 {
 		power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 158 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_i2c0: i2c@20000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
index 02d4285acbb8..1181ad017626 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
@@ -14,6 +14,7 @@ mcu_uart0: serial@4a00000 {
 		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 149 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	mcu_uart1: serial@4a10000 {
@@ -24,6 +25,7 @@ mcu_uart1: serial@4a10000 {
 		power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 160 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	mcu_i2c0: i2c@4900000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 5cf913860f80..78f246077ca9 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -325,6 +325,7 @@ AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
 };
 
 &main_uart0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_uart0_pins_default>;
 };
@@ -334,34 +335,6 @@ &main_uart1 {
 	status = "reserved";
 };
 
-&main_uart2 {
-	status = "disabled";
-};
-
-&main_uart3 {
-	status = "disabled";
-};
-
-&main_uart4 {
-	status = "disabled";
-};
-
-&main_uart5 {
-	status = "disabled";
-};
-
-&main_uart6 {
-	status = "disabled";
-};
-
-&mcu_uart0 {
-	status = "disabled";
-};
-
-&mcu_uart1 {
-	status = "disabled";
-};
-
 &main_i2c1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c1_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 738d0cf6c40a..8423295150fc 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -338,15 +338,8 @@ AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
 	};
 };
 
-&mcu_uart0 {
-	status = "disabled";
-};
-
-&mcu_uart1 {
-	status = "disabled";
-};
-
 &main_uart0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_uart0_pins_default>;
 };
@@ -356,26 +349,6 @@ &main_uart1 {
 	status = "reserved";
 };
 
-&main_uart2 {
-	status = "disabled";
-};
-
-&main_uart3 {
-	status = "disabled";
-};
-
-&main_uart4 {
-	status = "disabled";
-};
-
-&main_uart5 {
-	status = "disabled";
-};
-
-&main_uart6 {
-	status = "disabled";
-};
-
 &mcu_i2c0 {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 02/10] arm64: dts: ti: k3-am64: Enable I2C nodes at the board level

[Andrew Davis]

I2C nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the I2C nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  4 ++++
 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  |  2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  |  9 +--------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 13 +------------
 4 files changed, 8 insertions(+), 20 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index a115c668d001..fdcacf78f4a6 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -321,6 +321,7 @@ main_i2c0: i2c@20000000 {
 		power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 102 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c1: i2c@20010000 {
@@ -332,6 +333,7 @@ main_i2c1: i2c@20010000 {
 		power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 103 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c2: i2c@20020000 {
@@ -343,6 +345,7 @@ main_i2c2: i2c@20020000 {
 		power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 104 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c3: i2c@20030000 {
@@ -354,6 +357,7 @@ main_i2c3: i2c@20030000 {
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 105 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_spi0: spi@20100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
index 1181ad017626..5ce8ceb3779d 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
@@ -37,6 +37,7 @@ mcu_i2c0: i2c@4900000 {
 		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 106 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	mcu_i2c1: i2c@4910000 {
@@ -48,6 +49,7 @@ mcu_i2c1: i2c@4910000 {
 		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 107 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	mcu_spi0: spi@4b00000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 78f246077ca9..3903e907244e 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -336,6 +336,7 @@ &main_uart1 {
 };
 
 &main_i2c1 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c1_pins_default>;
 	clock-frequency = <400000>;
@@ -378,14 +379,6 @@ &mcu_gpio0 {
 	status = "reserved";
 };
 
-&mcu_i2c0 {
-	status = "disabled";
-};
-
-&mcu_i2c1 {
-	status = "disabled";
-};
-
 &mcu_spi0 {
 	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 8423295150fc..56763d839e05 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -349,15 +349,8 @@ &main_uart1 {
 	status = "reserved";
 };
 
-&mcu_i2c0 {
-	status = "disabled";
-};
-
-&mcu_i2c1 {
-	status = "disabled";
-};
-
 &main_i2c1 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c1_pins_default>;
 	clock-frequency = <400000>;
@@ -382,10 +375,6 @@ exp2: gpio@60 {
 	};
 };
 
-&main_i2c3 {
-	status = "disabled";
-};
-
 &mcu_spi0 {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 03/10] arm64: dts: ti: k3-am64: Enable SPI nodes at the board level

[Andrew Davis]

SPI nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the SPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 5 +++++
 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  | 2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 9 +--------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 8 --------
 4 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index fdcacf78f4a6..375078ca4fdd 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -370,6 +370,7 @@ main_spi0: spi@20100000 {
 		clocks = <&k3_clks 141 0>;
 		dmas = <&main_pktdma 0xc300 0>, <&main_pktdma 0x4300 0>;
 		dma-names = "tx0", "rx0";
+		status = "disabled";
 	};
 
 	main_spi1: spi@20110000 {
@@ -380,6 +381,7 @@ main_spi1: spi@20110000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 142 0>;
+		status = "disabled";
 	};
 
 	main_spi2: spi@20120000 {
@@ -390,6 +392,7 @@ main_spi2: spi@20120000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 143 0>;
+		status = "disabled";
 	};
 
 	main_spi3: spi@20130000 {
@@ -400,6 +403,7 @@ main_spi3: spi@20130000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 144 0>;
+		status = "disabled";
 	};
 
 	main_spi4: spi@20140000 {
@@ -410,6 +414,7 @@ main_spi4: spi@20140000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 145 0>;
+		status = "disabled";
 	};
 
 	main_gpio_intr: interrupt-controller@a00000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
index 5ce8ceb3779d..38ddf0b3b8a0 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
@@ -60,6 +60,7 @@ mcu_spi0: spi@4b00000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 147 0>;
+		status = "disabled";
 	};
 
 	mcu_spi1: spi@4b10000 {
@@ -70,6 +71,7 @@ mcu_spi1: spi@4b10000 {
 		#size-cells = <0>;
 		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 148 0>;
+		status = "disabled";
 	};
 
 	mcu_gpio_intr: interrupt-controller@4210000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 3903e907244e..12d971c3bc3a 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -379,15 +379,8 @@ &mcu_gpio0 {
 	status = "reserved";
 };
 
-&mcu_spi0 {
-	status = "disabled";
-};
-
-&mcu_spi1 {
-	status = "disabled";
-};
-
 &main_spi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_spi0_pins_default>;
 	ti,pindir-d0-out-d1-in;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 56763d839e05..1a116593a771 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -375,14 +375,6 @@ exp2: gpio@60 {
 	};
 };
 
-&mcu_spi0 {
-	status = "disabled";
-};
-
-&mcu_spi1 {
-	status = "disabled";
-};
-
 /* mcu_gpio0 is reserved for mcu firmware usage */
 &mcu_gpio0 {
 	status = "reserved";
-- 
2.37.3


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[PATCH 04/10] arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level

[Andrew Davis]

EPWM nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the EPWM nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  9 +++++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 36 -------------------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 44 ------------------------
 3 files changed, 9 insertions(+), 80 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 375078ca4fdd..672575f44529 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -898,6 +898,7 @@ epwm0: pwm@23000000 {
 		power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm1: pwm@23010000 {
@@ -907,6 +908,7 @@ epwm1: pwm@23010000 {
 		power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm2: pwm@23020000 {
@@ -916,6 +918,7 @@ epwm2: pwm@23020000 {
 		power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm3: pwm@23030000 {
@@ -925,6 +928,7 @@ epwm3: pwm@23030000 {
 		power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm4: pwm@23040000 {
@@ -934,6 +938,7 @@ epwm4: pwm@23040000 {
 		power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm5: pwm@23050000 {
@@ -943,6 +948,7 @@ epwm5: pwm@23050000 {
 		power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm6: pwm@23060000 {
@@ -952,6 +958,7 @@ epwm6: pwm@23060000 {
 		power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm7: pwm@23070000 {
@@ -961,6 +968,7 @@ epwm7: pwm@23070000 {
 		power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	epwm8: pwm@23080000 {
@@ -970,6 +978,7 @@ epwm8: pwm@23080000 {
 		power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
 		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	ecap0: pwm@23100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 12d971c3bc3a..cef3afa10c39 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -580,42 +580,6 @@ &ecap2 {
 	status = "disabled";
 };
 
-&epwm0 {
-	status = "disabled";
-};
-
-&epwm1 {
-	status = "disabled";
-};
-
-&epwm2 {
-	status = "disabled";
-};
-
-&epwm3 {
-	status = "disabled";
-};
-
-&epwm4 {
-	status = "disabled";
-};
-
-&epwm5 {
-	status = "disabled";
-};
-
-&epwm6 {
-	status = "disabled";
-};
-
-&epwm7 {
-	status = "disabled";
-};
-
-&epwm8 {
-	status = "disabled";
-};
-
 &icssg0_mdio {
 	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 1a116593a771..51f4ae165c13 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -579,50 +579,6 @@ &ecap2 {
 	status = "disabled";
 };
 
-&epwm0 {
-	status = "disabled";
-};
-
-&epwm1 {
-	status = "disabled";
-};
-
-&epwm2 {
-	status = "disabled";
-};
-
-&epwm3 {
-	status = "disabled";
-};
-
-&epwm4 {
-	/*
-	 * EPWM4_A, EPWM4_B is available on Pin 32 and 33 on J4 (RPi hat)
-	 * But RPi Hat will be used for other use cases, so marking epwm4 as disabled.
-	 */
-	status = "disabled";
-};
-
-&epwm5 {
-	/*
-	 * EPWM5_A, EPWM5_B is available on Pin 29 and 31 on J4 (RPi hat)
-	 * But RPi Hat will be used for other use cases, so marking epwm5 as disabled.
-	 */
-	status = "disabled";
-};
-
-&epwm6 {
-	status = "disabled";
-};
-
-&epwm7 {
-	status = "disabled";
-};
-
-&epwm8 {
-	status = "disabled";
-};
-
 &icssg0_mdio {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 05/10] arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level

[Andrew Davis]

ECAP nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information. (These and the EPWM nodes could be used to trigger internal
actions but they are not used like that currently)

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the ECAP nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 3 +++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 9 +--------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 9 +--------
 3 files changed, 5 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 672575f44529..ef1833f65bdc 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -988,6 +988,7 @@ ecap0: pwm@23100000 {
 		power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 51 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	ecap1: pwm@23110000 {
@@ -997,6 +998,7 @@ ecap1: pwm@23110000 {
 		power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 52 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	ecap2: pwm@23120000 {
@@ -1006,6 +1008,7 @@ ecap2: pwm@23120000 {
 		power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 53 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_rti0: watchdog@e000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index cef3afa10c39..43d50ecfb211 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -567,19 +567,12 @@ &pcie0_ep {
 };
 
 &ecap0 {
+	status = "okay";
 	/* PWM is available on Pin 1 of header J12 */
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
 
-&ecap1 {
-	status = "disabled";
-};
-
-&ecap2 {
-	status = "disabled";
-};
-
 &icssg0_mdio {
 	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 51f4ae165c13..8b9987ccdc1b 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -566,19 +566,12 @@ &pcie0_ep {
 };
 
 &ecap0 {
+	status = "okay";
 	/* PWM is available on Pin 1 of header J3 */
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
 
-&ecap1 {
-	status = "disabled";
-};
-
-&ecap2 {
-	status = "disabled";
-};
-
 &icssg0_mdio {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 06/10] arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level

[Andrew Davis]

PCIe nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with a SerDes PHY.
And usually only one of the two modes can be used at a time as they
share a SerDes link.

As the PHY and mode is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the PCIe nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 2 +-
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 8 --------
 3 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index ef1833f65bdc..b193f88a7a0f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -871,6 +871,7 @@ pcie0_rc: pcie@f102000 {
 		ranges = <0x01000000 0x00 0x68001000  0x00 0x68001000  0x00 0x0010000>,
 			 <0x02000000 0x00 0x68011000  0x00 0x68011000  0x00 0x7fef000>;
 		dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
+		status = "disabled";
 	};
 
 	pcie0_ep: pcie-ep@f102000 {
@@ -889,6 +890,7 @@ pcie0_ep: pcie-ep@f102000 {
 		clocks = <&k3_clks 114 0>;
 		clock-names = "fck";
 		max-functions = /bits/ 8 <1>;
+		status = "disabled";
 	};
 
 	epwm0: pwm@23000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 43d50ecfb211..2dec25d90240 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -553,6 +553,7 @@ serdes0_pcie_link: phy@0 {
 };
 
 &pcie0_rc {
+	status = "okay";
 	reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
 	phys = <&serdes0_pcie_link>;
 	phy-names = "pcie-phy";
@@ -563,7 +564,6 @@ &pcie0_ep {
 	phys = <&serdes0_pcie_link>;
 	phy-names = "pcie-phy";
 	num-lanes = <1>;
-	status = "disabled";
 };
 
 &ecap0 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 8b9987ccdc1b..58c71608d925 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -557,14 +557,6 @@ &main_r5fss1_core1 {
 			<&main_r5fss1_core1_memory_region>;
 };
 
-&pcie0_rc {
-	status = "disabled";
-};
-
-&pcie0_ep {
-	status = "disabled";
-};
-
 &ecap0 {
 	status = "okay";
 	/* PWM is available on Pin 1 of header J3 */
-- 
2.37.3


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[PATCH 07/10] arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node

[Andrew Davis]

Although usually integrated as a child of an Ethernet controller, MDIO
IP has an independent pinout. This pinout should be controlled by
the MDIO node (so if it was to be disabled for instance, the pinmux
state would reflect that).

Move the MDIO pins pinmux to the MIDO nodes.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am642-evm.dts | 6 ++++--
 arch/arm64/boot/dts/ti/k3-am642-sk.dts  | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 2dec25d90240..2319ba4f5ae3 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -425,8 +425,7 @@ &usb0 {
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mdio1_pins_default
-		     &rgmii1_pins_default
+	pinctrl-0 = <&rgmii1_pins_default
 		     &rgmii2_pins_default>;
 };
 
@@ -441,6 +440,9 @@ &cpsw_port2 {
 };
 
 &cpsw3g_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio1_pins_default>;
+
 	cpsw3g_phy0: ethernet-phy@0 {
 		reg = <0>;
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 58c71608d925..c1d634647027 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -439,8 +439,7 @@ &usb0 {
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mdio1_pins_default
-		     &rgmii1_pins_default
+	pinctrl-0 = <&rgmii1_pins_default
 		     &rgmii2_pins_default>;
 };
 
@@ -455,6 +454,9 @@ &cpsw_port2 {
 };
 
 &cpsw3g_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio1_pins_default>;
+
 	cpsw3g_phy0: ethernet-phy@0 {
 		reg = <0>;
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-- 
2.37.3


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[PATCH 08/10] arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level

[Andrew Davis]

MDIO nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with a pinmux.

As the attached PHY is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the MDIO nodes (in both CPSW and ICSSG) in the dtsi files and
only enable the ones that are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 3 +++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 9 +--------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 9 +--------
 3 files changed, 5 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index b193f88a7a0f..7ea07f7fe5a2 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -552,6 +552,7 @@ cpsw3g_mdio: mdio@f00 {
 			clocks = <&k3_clks 13 0>;
 			clock-names = "fck";
 			bus_freq = <1000000>;
+			status = "disabled";
 		};
 
 		cpts@3d000 {
@@ -1168,6 +1169,7 @@ icssg0_mdio: mdio@32400 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			bus_freq = <1000000>;
+			status = "disabled";
 		};
 	};
 
@@ -1308,6 +1310,7 @@ icssg1_mdio: mdio@32400 {
 			clocks = <&k3_clks 82 0>;
 			clock-names = "fck";
 			bus_freq = <1000000>;
+			status = "disabled";
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 2319ba4f5ae3..9a3bf852810c 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -440,6 +440,7 @@ &cpsw_port2 {
 };
 
 &cpsw3g_mdio {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio1_pins_default>;
 
@@ -575,14 +576,6 @@ &ecap0 {
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
 
-&icssg0_mdio {
-	status = "disabled";
-};
-
-&icssg1_mdio {
-	status = "disabled";
-};
-
 &main_mcan0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mcan0_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index c1d634647027..451e1483f3e4 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -454,6 +454,7 @@ &cpsw_port2 {
 };
 
 &cpsw3g_mdio {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio1_pins_default>;
 
@@ -566,14 +567,6 @@ &ecap0 {
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
 
-&icssg0_mdio {
-	status = "disabled";
-};
-
-&icssg1_mdio {
-	status = "disabled";
-};
-
 &main_mcan0 {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 09/10] arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level

[Andrew Davis]

MCAN nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the MCAN nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 2 ++
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 8 --------
 3 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 7ea07f7fe5a2..d6218038055a 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1326,6 +1326,7 @@ main_mcan0: can@20701000 {
 			     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "int0", "int1";
 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+		status = "disabled";
 	};
 
 	main_mcan1: can@20711000 {
@@ -1340,6 +1341,7 @@ main_mcan1: can@20711000 {
 			     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "int0", "int1";
 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+		status = "disabled";
 	};
 
 	crypto: crypto@40900000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 9a3bf852810c..666f5d3a2d95 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -577,12 +577,14 @@ &ecap0 {
 };
 
 &main_mcan0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mcan0_pins_default>;
 	phys = <&transceiver1>;
 };
 
 &main_mcan1 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mcan1_pins_default>;
 	phys = <&transceiver2>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 451e1483f3e4..3e6df16fcb59 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -567,14 +567,6 @@ &ecap0 {
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
 
-&main_mcan0 {
-	status = "disabled";
-};
-
-&main_mcan1 {
-	status = "disabled";
-};
-
 &gpmc0 {
 	status = "disabled";
 };
-- 
2.37.3


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[PATCH 10/10] arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level

[Andrew Davis]

The GPMC node defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless it is extended with pinmux information.

As the pinmux is only known at the board integration level, this node
should only be enabled when provided with this information.

Disable the GPMC node in the dtsi file. Since the ELM is made to work
with the GPMC, disable it too.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 ++
 arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 8 --------
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 8 --------
 3 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index d6218038055a..c96df4b9b3d7 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1381,6 +1381,7 @@ gpmc0: memory-controller@3b000000 {
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		status = "disabled";
 	};
 
 	elm0: ecc@25010000 {
@@ -1390,5 +1391,6 @@ elm0: ecc@25010000 {
 		power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 54 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 666f5d3a2d95..39feea78a084 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -589,11 +589,3 @@ &main_mcan1 {
 	pinctrl-0 = <&main_mcan1_pins_default>;
 	phys = <&transceiver2>;
 };
-
-&gpmc0 {
-	status = "disabled";
-};
-
-&elm0 {
-	status = "disabled";
-};
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 3e6df16fcb59..2e2d40da360a 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -566,11 +566,3 @@ &ecap0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
-
-&gpmc0 {
-	status = "disabled";
-};
-
-&elm0 {
-	status = "disabled";
-};
-- 
2.37.3


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Re: [PATCH 00/10] AM64x Disable Incomplete DT Nodes

[Bryan Brattlof]

On October 17, 2022 thus sayeth Andrew Davis:
> Hello all,
> 
> This series goes through the AM64x dtsi and disables the set of nodes
> that are not functional without additional board level information.
> This is usually pinmux data, but can also be inernal device resources.
> 
> Only when the node is completed in the board file should the node be
> enabled. This helps prevents nodes that represent IP that are not
> pinned-out on a given board from being left enabled.
> 
> This also reduces the effort needed to add a new board, one no longer
> needs to manually disable all the extra IP. For instance TI J784s4 has
> 20(!) MCAN instances. It is much easier to enable the one you pin out,
> vs disabling the 19 that you did not.
> 
> Thanks,
> Andrew
> 
> Andrew Davis (10):
>   arm64: dts: ti: k3-am64: Enable UART nodes at the board level
>   arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
>   arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
>   arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
>   arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
>   arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
>   arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
>   arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
>   arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
>   arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level
> 
>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  37 ++++++
>  arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  |   6 +
>  arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 119 ++-----------------
>  arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 142 ++---------------------
>  4 files changed, 63 insertions(+), 241 deletions(-)
> 

Reviewed-by: Bryan Brattlof <bb@ti.com>

I wholeheartedly agree! This looks great to me!

~Bryan

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Re: [PATCH 00/10] AM64x Disable Incomplete DT Nodes

[Vignesh Raghavendra]

On 18/10/22 00:55, Andrew Davis wrote:
> Andrew Davis (10):
>   arm64: dts: ti: k3-am64: Enable UART nodes at the board level
>   arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
>   arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
>   arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
>   arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
>   arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
>   arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
>   arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
>   arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
>   arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level
> 
>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi |  37 ++++++
>  arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi  |   6 +
>  arch/arm64/boot/dts/ti/k3-am642-evm.dts  | 119 ++-----------------
>  arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 142 ++---------------------
>  4 files changed, 63 insertions(+), 241 deletions(-)

Acked-by: Vignesh Raghavendra <vigneshr@ti.com>


-- 
Regards
Vignesh

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Re: [PATCH 00/10] AM64x Disable Incomplete DT Nodes

[Nishanth Menon]

Hi Andrew Davis,

On Mon, 17 Oct 2022 14:25:22 -0500, Andrew Davis wrote:
> This series goes through the AM64x dtsi and disables the set of nodes
> that are not functional without additional board level information.
> This is usually pinmux data, but can also be inernal device resources.
> 
> Only when the node is completed in the board file should the node be
> enabled. This helps prevents nodes that represent IP that are not
> pinned-out on a given board from being left enabled.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[01/10] arm64: dts: ti: k3-am64: Enable UART nodes at the board level
        commit: dacf4705cee54eef4406a886a0a50a6f445969f8
[02/10] arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
        commit: b80f75d8f68cad4efa250e4a3152932f59c756cc
[03/10] arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
        commit: 79d4aa623f6c9d47aa29b6b4a3fa46c09f74bfae
[04/10] arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
        commit: ebc0ed718da346d651b356cb71dddfb747c934fa
[05/10] arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
        commit: dcac8eaaa90fe2c84761cf55a3e989ca5774d2f5
[06/10] arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
        commit: 3e21ec289c76dbc88dc306802122214b6b053a99
[07/10] arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
        commit: aa62d661247f180d0fc534e880cb6bc7fb50b4a1
[08/10] arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
        commit: f572888b3c10bf12436423e854f6ee6e3872c570
[09/10] arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
        commit: 4a57988707d7c7502842de07d6c8649da5a844fc
[10/10] arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level
        commit: 4eb7aa3befa33c05a03d11fd3b4bb8b74d3c68c0

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D


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