From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7EF8C433FE for ; Wed, 2 Nov 2022 19:43:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0/oyiuuP1nIuOEfw8SbS2JzQMxNkqCNWEyJVqiER2vw=; b=V7roRH3P9UmJ33 fLcHu9uckBEWe5Av+AWUUQLH2VKsZZ6ZYJ1tvR4Vl98lD6kduV+GRa6tPeP+mwYvChsMIke7tHS2r PXNA0oRCnKzbYRefcwgQkcKhpqxzSqMYRJOXgQ/liEN1WWoPmAA3Bcds/9APpBerY2jP6lgvzEvO1 w5IblnQ0qIwf4xs0gQlLHEExjffYFrpifTWa+RPB5cG4kAYoWgpdaKwZwcGRWK+E283zJuLmAmwPv B0Nz5yZF2hyvF0hogCR4OIdYPLzjh+mPbcDuTz0mKJU3Oa49WXDlew71s/0Mb+Tp5yhRB9fdjWJ2B MpdJ46Lgo/cm6GNCxTTw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqJcb-00E0YD-0G; Wed, 02 Nov 2022 19:41:57 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqJcX-00E0TR-NB for linux-arm-kernel@lists.infradead.org; Wed, 02 Nov 2022 19:41:55 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2A2JfkAg005858; Wed, 2 Nov 2022 14:41:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667418106; bh=RZL3NQLhGNU5QGx3OdaGdZVvg9x4UOH8qQy79a3Y4XQ=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=m3Uj5wzXt+qu5dbtq6p81g8zU/EzsO2BQZpIitQJhqZjyW6S3SzofN0GYLr5CGySZ R4ZYRGacGCSj+tFYO4n9wlPUa6ueoxIF/abKBpyzBxlfKwHEzCLtjSOMoXYBn75cj+ 39g13tlWkLQBlFryT8rDVUix5Q4y2fQbkuZPVtnw= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2A2Jfkbh050324 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Nov 2022 14:41:46 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 2 Nov 2022 14:41:46 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 2 Nov 2022 14:41:46 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2A2Jfkrv100649; Wed, 2 Nov 2022 14:41:46 -0500 Date: Wed, 2 Nov 2022 14:41:46 -0500 From: Nishanth Menon To: Wadim Egorov CC: "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "vigneshr@ti.com" , "kristo@kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" Subject: Re: [PATCH 2/2] arm64: dts: Add support for phyBOARD-Electra-AM642 Message-ID: <20221102194146.zyaw2yzl7q4b6r7u@ducky> References: <20221102134923.3438022-1-w.egorov@phytec.de> <20221102134923.3438022-2-w.egorov@phytec.de> <20221102151047.ucwh7dwmmqhx4nxf@rejoice> <1c73c3a0-458a-0005-f9a7-2d879e70cfe3@phytec.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1c73c3a0-458a-0005-f9a7-2d879e70cfe3@phytec.de> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221102_124153_877802_35E36165 X-CRM114-Status: GOOD ( 27.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16:56-20221102, Wadim Egorov wrote: [...] > >> + > >> +#include > >> +#include > >> +#include > >> + > >> +/ { > >> + model = "PHYTEC phyCORE-AM64x"; > >> + compatible = "phytec,am64-phycore-som"; > > Does this match the binding? > > Not very sure about the compatible I should chose here. It is probably not very > important since the compatible gets overridden by the carrier which specifies > the am642 SoC. > Seems like the TI SoMs (k3-j7*som*.dtsi) do not add a compatible at all. > > Or do you think we should add the "ti,am642" compatible here? If the compatible of SoM makes much sense as a standalone OR usable elsewhere, then it could be an enum option to allow for som, soC as a valid combination. On the other hand, simplistically, it does look like SoM (like the j7es processor board) serves no specific purpose standalone, in which case skipping it is more appropriate. > >> + > >> + rtos_ipc_memory_region: ipc-memories@a5000000 { > >> + reg = <0x00 0xa5000000 0x00 0x00800000>; > >> + alignment = <0x1000>; Since it is no-map, alignment does'nt serve any purpose, right? > >> + no-map; > >> + }; > > Does this memory map work for All usage of the SoM and firmware > > combinations? OR would you like to keep the immutable memory map > > reservation in the base device tree and use overlay for firmware > > combination? > > Can you be a bit more specific about the firmware and the combinations you are > talking about? > For now, I just applied the same memory maps as the k3-am642-evm.dts. > > Are you referring to the variants of the AM64 which can come with more or less > R5 cores? > So an AM644 and AM641 would need different entries here and should be adjusted > e.g. per dt overlays? > In that case it would be nice to have a minimal set of regions defined in the > som.dtsi. Two things: In the actual usage of the board, do folks tend to stick with the memory map OR does the memory map tend to change? there are specific stuff like DM or tisci or tfa that does look mandatory. Further, if there are variations like the processor variations you mention with differing R5 combinations (processor and firmware), overlays will be your friend as it can scale across multiple carrier board options as well. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel