From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C998CC433FE for ; Fri, 4 Nov 2022 23:56:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=w8yQ1slMzaBvUfgBiGvWIBJYxrkKoKOMaQ148i1QWsU=; b=n89NeBDKYliZ1Q w0GcQkM7rmx5o4C3XVbsgokVeXciz5NfHhjn86ObR6wGgrMbglpwZDYPxfrFnWXJ2w+jWqZHM0Kf/ BfQqsu7sREeNNOgbMOEnv5SGO+UiA+gzDIEfc14QDn592hTZsuf7eMfbTzvJ9tLv80vGmPezg9KXH 8BlkAzEj45MgWEbTYkKLgp6koGgH4sxLsqNOdFvYR8OsvTOvNz/dhoxUSyIVPFV4jVNFthTMbAqoh Hm5PK3TJd5dbe7mYFMkFlDWHWY/Bddo8qlDOKhIEMbp0tqGKFBRAvb7y7KrPKsyCEO7PSYxe+D4ol LgkvzQWvt2kDlQMVQCZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1or6XF-005Wnp-M9; Fri, 04 Nov 2022 23:55:41 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1or6Wn-005WdL-1q for linux-arm-kernel@lists.infradead.org; Fri, 04 Nov 2022 23:55:14 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 29D9362399; Fri, 4 Nov 2022 23:55:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A0C9DC433C1; Fri, 4 Nov 2022 23:55:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1667606110; bh=x4bmiErZJ7SZyMFRSsk5JKsWnPXrlyR9WZE/FfpAobo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WOFVO4OMfLfeFjoME3Mp8ezef9JRRxb+/KalqWmNmg/NzaXxqFz05kT8UO4y3cMKy VtT/ZlQHA4w60G2vBDnyNQXFmI4n8WGE81G47d+nFqWYs8MkPiaTSTFOAZ47PlqYn8 x+VT4mSh+w6tGni4A+oaYgY1IM+iI0y1MVgbmzw4qoBm/v6aKdO39ZZYDQvioBwzDN DN5D71V4QT2kd9D3rYMzCAqQYq7NNgjn4eU5Kd554vRJ3NY622mPm4atMxO7EwV0F3 CvGrtJmI0inkDERmX7TrgoVOtqyhl7UvTznqKkHk7eDtTx+XcaUqn+5GN5cusLo4tE 9uUzG6DmTPb+w== From: Mark Brown To: Catalin Marinas , Will Deacon , Marc Zyngier Cc: Lorenzo Pieralisi , Mark Rutland , Sami Mujawar , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Mark Brown Subject: [PATCH v1 04/18] arm64/sysreg: Add definitions for immediate versions of MSR ALLINT Date: Fri, 4 Nov 2022 23:54:39 +0000 Message-Id: <20221104235453.870573-5-broonie@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221104235453.870573-1-broonie@kernel.org> References: <20221104235453.870573-1-broonie@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2341; i=broonie@kernel.org; h=from:subject; bh=x4bmiErZJ7SZyMFRSsk5JKsWnPXrlyR9WZE/FfpAobo=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBjZaY+AQOBqUkutL7vHrnFr1g+2sG1otffMzqRe+hO UMSeKw+JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCY2WmPgAKCRAk1otyXVSH0F26B/ 9G5bpkAPOk2Unt5wuPim6nfQj7zNoR9aacvL4RGdC554y8Vcl/+fmnc8JajDEKA0FiGGAs97PoTegV sXxoY3Heedp8CGIjVCXQk6LFgHuMl328pcz/r3d3/3tUtrWvOWj1rz/zeIjbQLSsEl9gkq2V4ayqXP F5icpzD6XhqOYwpQBac1tZZq6mcEXoKGFtwOKQl8oVM1mnk4RjZODTS67VU9xopLJNJG2G6eVNoiU3 aI3rBL6zdWD60EPjH0QxhiIHvSRHrl/IbZpYvPYkpH+jqwJI3qwSGJk1hMdJbC3V5wrSgyFyPk8XeE k33Vri7AwhrvTV4zMNqdXDaFq/OL8i X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_165513_227338_BFFD619F X-CRM114-Status: GOOD ( 15.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Encodings are provided for ALLINT which allow setting of ALLINT.ALLINT using an immediate rather than requiring that a register be loaded with the value to write. Since these don't currently fit within the scheme we have for sysreg generation add manual encodings like we currently do for other similar registers such as SVCR. Since it is required that these immediate versions be encoded with xzr as the source register provide asm wrapper which ensure this is the case. Signed-off-by: Mark Brown --- arch/arm64/include/asm/daifflags.h | 1 + arch/arm64/include/asm/nmi.h | 18 ++++++++++++++++++ arch/arm64/include/asm/sysreg.h | 2 ++ 3 files changed, 21 insertions(+) create mode 100644 arch/arm64/include/asm/nmi.h diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h index 55f57dfa8e2f..b3bed2004342 100644 --- a/arch/arm64/include/asm/daifflags.h +++ b/arch/arm64/include/asm/daifflags.h @@ -141,4 +141,5 @@ static inline void local_daif_inherit(struct pt_regs *regs) */ write_sysreg(flags, daif); } + #endif diff --git a/arch/arm64/include/asm/nmi.h b/arch/arm64/include/asm/nmi.h new file mode 100644 index 000000000000..067e2554e144 --- /dev/null +++ b/arch/arm64/include/asm/nmi.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 ARM Ltd. + */ +#ifndef __ASM_NMI_H +#define __ASM_NMI_H + +static __always_inline void _allint_clear(void) +{ + asm volatile(__msr_s(SYS_ALLINT_CLR, "xzr")); +} + +static __always_inline void _allint_set(void) +{ + asm volatile(__msr_s(SYS_ALLINT_SET, "xzr")); +} + +#endif diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 7d301700d1a9..0c07b740c750 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -126,6 +126,8 @@ * System registers, organised loosely by encoding but grouped together * where the architected name contains an index. e.g. ID_MMFR_EL1. */ +#define SYS_ALLINT_CLR sys_reg(0, 1, 4, 0, 0) +#define SYS_ALLINT_SET sys_reg(0, 1, 4, 1, 0) #define SYS_SVCR_SMSTOP_SM_EL0 sys_reg(0, 3, 4, 2, 3) #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3) #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3) -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel