From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50FB0C4332F for ; Mon, 7 Nov 2022 00:58:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wshZYKxWNdqOTueGs0J1XRpIQd4PCCbjd5YordTwUEs=; b=NdlRfjHlccKycw 2kju5QCGADxM/Lb/r74q4p52I53EZohyHSGNHWw9JNhvU8E0OMihny9kNIj+U7JJpQ5sNGi0G4rvS xaWB4I838QU5092XjByA1IUn+9+ezMPcy+UV2IA6IhXybtEcsGgeWdU1vwuRji1bTBlrP3jo7lQTN p+zvFpnXFoNLfwCpANuKDG/qH2cImWGA2iDa4BtrRk6rnQ7vzc3Pv9jWKdIOFb5XvBMwPnJejyQ12 H9Xra6cpmL7MsKMXmxW4zFg5hrVNfYJ8rU1K5uDX3+zlDPzmhKg8Fp1wvI4dUeZkOhF9rbrPpoRfs pxM6n5gvs6P+qU7KXmDg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1orqRr-00AjdA-FX; Mon, 07 Nov 2022 00:57:11 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1orqQz-00AjFP-1l for linux-arm-kernel@lists.infradead.org; Mon, 07 Nov 2022 00:56:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2165E1FB; Sun, 6 Nov 2022 16:56:22 -0800 (PST) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 124003F703; Sun, 6 Nov 2022 16:56:13 -0800 (PST) From: Andre Przywara To: Chen-Yu Tsai , Samuel Holland , Jernej Skrabec , Rob Herring , Krzysztof Kozlowski Cc: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= , Icenowy Zheng , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Mauro Carvalho Chehab , linux-media@vger.kernel.org Subject: [PATCH v2 06/10] ARM: dts: suniv: f1c100s: add CIR DT node Date: Mon, 7 Nov 2022 00:54:29 +0000 Message-Id: <20221107005433.11079-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.35.5 In-Reply-To: <20221107005433.11079-1-andre.przywara@arm.com> References: <20221107005433.11079-1-andre.przywara@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221106_165617_200213_7A88EDF3 X-CRM114-Status: UNSURE ( 9.86 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The CIR (infrared receiver) controller in the Allwinner F1C100s series of SoCs is compatible to the ones used in other Allwinner SoCs. Add the DT node describing the resources of the controller. There are multiple possible pinmuxes, but none as them seem to be an obvious choice, so refrain from adding any pincontroller subnodes for now. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec --- arch/arm/boot/dts/suniv-f1c100s.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 4f45168cea42..c04cd175f743 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -269,6 +269,17 @@ pwm: pwm@1c21000 { status = "disabled"; }; + ir: ir@1c22c00 { + compatible = "allwinner,suniv-f1c100s-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x01c22c00 0x400>; + clocks = <&ccu CLK_BUS_IR>, <&ccu CLK_IR>; + clock-names = "apb", "ir"; + resets = <&ccu RST_BUS_IR>; + interrupts = <6>; + status = "disabled"; + }; + uart0: serial@1c25000 { compatible = "snps,dw-apb-uart"; reg = <0x01c25000 0x400>; -- 2.35.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel