From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
<kvmarm@lists.cs.columbia.edu>, <kvmarm@lists.linux.dev>,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Ricardo Koller <ricarkol@google.com>,
Reiji Watanabe <reijiw@google.com>
Subject: [PATCH v3 01/14] arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF
Date: Mon, 7 Nov 2022 08:54:22 +0000 [thread overview]
Message-ID: <20221107085435.2581641-2-maz@kernel.org> (raw)
In-Reply-To: <20221107085435.2581641-1-maz@kernel.org>
Align the ID_DFR0_EL1.PerfMon values with ID_AA64DFR0_EL1.PMUver.
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 7d301700d1a9..84f59ce1dc6d 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -698,6 +698,8 @@
#define ID_DFR0_PERFMON_8_1 0x4
#define ID_DFR0_PERFMON_8_4 0x5
#define ID_DFR0_PERFMON_8_5 0x6
+#define ID_DFR0_PERFMON_8_7 0x7
+#define ID_DFR0_PERFMON_IMP_DEF 0xf
#define ID_ISAR4_SWP_FRAC_SHIFT 28
#define ID_ISAR4_PSR_M_SHIFT 24
--
2.34.1
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next prev parent reply other threads:[~2022-11-07 8:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-07 8:54 [PATCH v3 00/14] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Marc Zyngier
2022-11-07 8:54 ` Marc Zyngier [this message]
2022-11-07 8:54 ` [PATCH v3 02/14] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode Marc Zyngier
2022-11-12 7:55 ` Reiji Watanabe
2022-11-12 12:39 ` Marc Zyngier
2022-11-12 17:11 ` Reiji Watanabe
2022-11-07 8:54 ` [PATCH v3 03/14] KVM: arm64: PMU: Always advertise the CHAIN event Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 04/14] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 05/14] KVM: arm64: PMU: Narrow the overflow checking when required Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 06/14] KVM: arm64: PMU: Only narrow counters that are not 64bit wide Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 07/14] KVM: arm64: PMU: Add counter_index_to_*reg() helpers Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 08/14] KVM: arm64: PMU: Simplify setting a counter to a specific value Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 09/14] KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bits Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 10/14] KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 11/14] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace Marc Zyngier
2022-11-08 5:38 ` Reiji Watanabe
2022-11-13 10:21 ` Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 12/14] KVM: arm64: PMU: Allow ID_DFR0_EL1.PerfMon " Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 13/14] KVM: arm64: PMU: Implement PMUv3p5 long counter support Marc Zyngier
2022-11-07 8:54 ` [PATCH v3 14/14] KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest Marc Zyngier
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