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From: Will Deacon <will@kernel.org>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-efi@vger.kernel.org,
	keescook@chromium.org, Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v4 0/6] arm64: efi: leave MMU and caches on at boot
Date: Mon, 7 Nov 2022 16:12:23 +0000	[thread overview]
Message-ID: <20221107161222.GE21157@willie-the-truck> (raw)
In-Reply-To: <20221018110441.3855148-1-ardb@kernel.org>

Hi Ard,

On Tue, Oct 18, 2022 at 01:04:35PM +0200, Ard Biesheuvel wrote:
> The purpose of this series is to remove any explicit cache maintenance
> for coherency during early boot that becomes unnecessary if we simply
> retain the cacheable 1:1 mapping of all of system RAM provided by EFI,
> and use it to populate the ID map page tables. After setting up this
> preliminary ID map, we disable the MMU, drop to EL1, reprogram the MAIR,
> TCR and SCTLR registers as before, and proceed as usual, avoiding the
> need for any manipulations of memory while the MMU and caches are off.
> 
> The only properties of the firmware provided 1:1 map we rely on is that
> it does not require any explicit cache maintenance for coherency, and
> that it covers the entire memory footprint of the image, including the
> BSS and padding at the end - all else is under control of the kernel
> itself, as before.
> 
> Changes since v3:
> - drop EFI_LOADER_CODE memory type patch that has been queued in the
>   mean time
> - rebased onto [partial] series that moves efi-entry.S into the libstub/
>   source directory [0]
> - fixed a correctness issue in patch #2

I really like this series, but I'm also very nervous about supporting
booting the kernel with the MMU enabled outside of EFI. The booting
documentation prohibits this, but we don't appear to take any steps to
prevent this case with your series. Perhaps we shouldn't, but I do think
it would be worth trying to warn+taint if we detect it so that we don't
spend too much time debugging strange memory issues on platforms that
try to use such a configuration.

What do you think?

Cheers,

Will

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  parent reply	other threads:[~2022-11-07 16:14 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18 11:04 [PATCH v4 0/6] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 1/6] arm64: lds: reduce effective minimum image alignment to 64k Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 2/6] arm64: kernel: move identity map out of .text mapping Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 3/6] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 4/6] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 5/6] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-10-18 11:04 ` [PATCH v4 6/6] arm64: efi/libstub: enter with the MMU on Ard Biesheuvel
2022-11-07 16:12 ` Will Deacon [this message]
2022-11-07 16:26   ` [PATCH v4 0/6] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel

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