* [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM
@ 2022-10-31 20:49 Marek Vasut
2022-11-01 1:23 ` Peng Fan
2022-11-11 3:44 ` Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Marek Vasut @ 2022-10-31 20:49 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Fabio Estevam, Peng Fan, Shawn Guo, NXP Linux Team
The i.MX8MP DHCOM SoM does contain muRata 2AE WiFi+BT chip, bind the
bluetooth to UART2 using btbcm and hci_bcm drivers. Use PLL3 to drive
UART2 clock divided down to 64 MHz to obtain suitable block clock for
exact 4 Mbdps, which is the maximum supported baud rate by the muRata
2AE BT UART.
Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
---
.../boot/dts/freescale/imx8mp-dhcom-som.dtsi | 31 +++++++++++++++----
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index 64ad384ca0b17..9f26cddeb9a1f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -523,6 +523,24 @@ &uart2 {
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
status = "okay";
+
+ /*
+ * PLL3 at 320 MHz supplies UART2 root with 64 MHz clock,
+ * which with 16x oversampling yields 4 Mbdps baud base,
+ * which is exactly the maximum rate supported by muRata
+ * 2AE bluetooth UART.
+ */
+ assigned-clocks = <&clk IMX8MP_SYS_PLL3>, <&clk IMX8MP_CLK_UART2>;
+ assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL3_OUT>;
+ assigned-clock-rates = <320000000>, <64000000>;
+
+ bluetooth {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2_bt>;
+ compatible = "cypress,cyw4373a0-bt";
+ shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ max-speed = <4000000>;
+ };
};
&uart3 {
@@ -988,6 +1006,13 @@ MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x49
>;
};
+ pinctrl_uart2_bt: dhcom-uart2-bt-grp {
+ fsl,pins = <
+ /* BT_REG_EN */
+ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
+ >;
+ };
+
pinctrl_uart3: dhcom-uart3-grp {
fsl,pins = <
MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x49
@@ -1025,8 +1050,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
- /* BT_REG_EN */
- MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
/* WL_REG_EN */
MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
>;
@@ -1040,8 +1063,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
- /* BT_REG_EN */
- MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
/* WL_REG_EN */
MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
>;
@@ -1055,8 +1076,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
- /* BT_REG_EN */
- MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
/* WL_REG_EN */
MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
>;
--
2.35.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM
2022-10-31 20:49 [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM Marek Vasut
@ 2022-11-01 1:23 ` Peng Fan
2022-11-11 3:44 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Peng Fan @ 2022-11-01 1:23 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel@lists.infradead.org
Cc: Fabio Estevam, Shawn Guo, dl-linux-imx
> Subject: [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH
> electronics i.MX8M Plus DHCOM
>
> The i.MX8MP DHCOM SoM does contain muRata 2AE WiFi+BT chip, bind the
> bluetooth to UART2 using btbcm and hci_bcm drivers. Use PLL3 to drive
> UART2 clock divided down to 64 MHz to obtain suitable block clock for exact
> 4 Mbdps, which is the maximum supported baud rate by the muRata 2AE BT
> UART.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: Fabio Estevam <festevam@denx.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> To: linux-arm-kernel@lists.infradead.org
> ---
> .../boot/dts/freescale/imx8mp-dhcom-som.dtsi | 31 +++++++++++++++----
> 1 file changed, 25 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> index 64ad384ca0b17..9f26cddeb9a1f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> @@ -523,6 +523,24 @@ &uart2 {
> pinctrl-0 = <&pinctrl_uart2>;
> uart-has-rtscts;
> status = "okay";
> +
> + /*
> + * PLL3 at 320 MHz supplies UART2 root with 64 MHz clock,
> + * which with 16x oversampling yields 4 Mbdps baud base,
> + * which is exactly the maximum rate supported by muRata
> + * 2AE bluetooth UART.
> + */
> + assigned-clocks = <&clk IMX8MP_SYS_PLL3>, <&clk
> IMX8MP_CLK_UART2>;
> + assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL3_OUT>;
> + assigned-clock-rates = <320000000>, <64000000>;
> +
> + bluetooth {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2_bt>;
> + compatible = "cypress,cyw4373a0-bt";
> + shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> + max-speed = <4000000>;
> + };
> };
>
> &uart3 {
> @@ -988,6 +1006,13 @@ MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS
> 0x49
> >;
> };
>
> + pinctrl_uart2_bt: dhcom-uart2-bt-grp {
> + fsl,pins = <
> + /* BT_REG_EN */
> + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
> 0x144
> + >;
> + };
> +
> pinctrl_uart3: dhcom-uart3-grp {
> fsl,pins = <
> MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX
> 0x49
> @@ -1025,8 +1050,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0
> 0x1d0
> MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1
> 0x1d0
> MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2
> 0x1d0
> MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3
> 0x1d0
> - /* BT_REG_EN */
> - MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
> 0x144
> /* WL_REG_EN */
> MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
> 0x144
> >;
> @@ -1040,8 +1063,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0
> 0x1d4
> MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1
> 0x1d4
> MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2
> 0x1d4
> MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3
> 0x1d4
> - /* BT_REG_EN */
> - MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
> 0x144
> /* WL_REG_EN */
> MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
> 0x144
> >;
> @@ -1055,8 +1076,6 @@ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0
> 0x1d6
> MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1
> 0x1d6
> MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2
> 0x1d6
> MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3
> 0x1d6
> - /* BT_REG_EN */
> - MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
> 0x144
> /* WL_REG_EN */
> MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
> 0x144
> >;
> --
Reviewed-by: Peng Fan <peng.fan@nxp.com>
> 2.35.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM
2022-10-31 20:49 [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM Marek Vasut
2022-11-01 1:23 ` Peng Fan
@ 2022-11-11 3:44 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2022-11-11 3:44 UTC (permalink / raw)
To: Marek Vasut; +Cc: linux-arm-kernel, Fabio Estevam, Peng Fan, NXP Linux Team
On Mon, Oct 31, 2022 at 09:49:55PM +0100, Marek Vasut wrote:
> The i.MX8MP DHCOM SoM does contain muRata 2AE WiFi+BT chip, bind the
> bluetooth to UART2 using btbcm and hci_bcm drivers. Use PLL3 to drive
> UART2 clock divided down to 64 MHz to obtain suitable block clock for
> exact 4 Mbdps, which is the maximum supported baud rate by the muRata
> 2AE BT UART.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
Applied, thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-10-31 20:49 [PATCH] arm64: dts: imx8mp: Bind bluetooth UART on DH electronics i.MX8M Plus DHCOM Marek Vasut
2022-11-01 1:23 ` Peng Fan
2022-11-11 3:44 ` Shawn Guo
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