From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 557C4C43219 for ; Fri, 11 Nov 2022 06:34:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gJdkw4lgdu90KwtYGRHDMIstM4DCcEWIKtG6zADQ8vM=; b=intaqmsyEA7iY1 o4Osw1WOQPIvX4APrKdlO2woB/de8vupxrqUtuIdujtxvX35PKy45C+r4yZpfWlWEYIGNfx1ZqkU+ sSXo2MUSa9YXNdag+7mh3sOTvQHW4iDOUwvEYnxfgWL813YTd5iIIjBWBvrCXGXtfeZkKAa8RT23g DzBHR0beuxNyBGenBZ0mQusnOqKd0LD/BSEz4gBkVSifuSW1LzmI3fblVMBPiTYZ9R6i/d/9y37Qd D2DqqSEjlVCpcDpeR5cv8lcGcXzaqlY85imwuwjOkzzsY1wzNwhMoMBWqc4pvLi4fhB3vpskUyTZ8 vMB1zYUu7LTyMiZIiuIg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1otNbd-00DbF6-Ix; Fri, 11 Nov 2022 06:33:37 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1otNbZ-00DbEI-KE for linux-arm-kernel@lists.infradead.org; Fri, 11 Nov 2022 06:33:36 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E2059B822ED; Fri, 11 Nov 2022 06:33:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2A23C433C1; Fri, 11 Nov 2022 06:33:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668148410; bh=GyshO67Skm89sLAwbCrx96/cw6ESqF1FCh9fkIs0wkU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=VL2NX0MBSyyByE4nuuThsp7hM4jFnTzQMHHfk/gesSoKtQce7I1qAKryjKfjtCLki BeyTN0bY6mNadyHOoMQdaqZeOUX4A1mSyyTAWr8BYZql4edTA7bpbzi3Rpz9FPBo07 Ry2jX6x7xSYkLRjjKWBIh0A92gG4/bsIeswH+lkVpjuzAv1/apxK5pS0tNNmgL3Z1k LXC+iNEU3rfrbfJTdqWbetGl92+sa4rRvglhuguYWGFSeXa78u5bL1T14DlgsMvRkt dZLCokVwzbdF5Ydevllg/WZppFsTycAWUweaDeHefwS93TE7pDYaafcV7TvnrjNtsS +BsHXLPh3vmnw== Date: Fri, 11 Nov 2022 14:33:23 +0800 From: Shawn Guo To: Marek Vasut Cc: linux-arm-kernel@lists.infradead.org, Fabio Estevam , Peng Fan , Richard Zhu , NXP Linux Team Subject: Re: [PATCH 1/3] arm64: dts: imx8mm: Deduplicate PCIe clock-names property Message-ID: <20221111063323.GK2649582@dragon> References: <20221102212248.138284-1-marex@denx.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221102212248.138284-1-marex@denx.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221110_223334_028419_A897450F X-CRM114-Status: GOOD ( 18.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 02, 2022 at 10:22:46PM +0100, Marek Vasut wrote: > Move the PCIe clock-names property from various DTs into SoC dtsi to > reduce duplication. In case of a couple of boards, reorder the clock > so they match the order in yaml DT bindings. > > Signed-off-by: Marek Vasut > --- > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Richard Zhu > Cc: Shawn Guo > Cc: NXP Linux Team > To: linux-arm-kernel@lists.infradead.org > --- > arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi | 1 - > arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 6 +++--- > arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 5 ++--- > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 + > 15 files changed, 28 insertions(+), 40 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi > index 03266bd90a06b..f3cb7e27799e7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi > @@ -241,9 +241,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk_gated>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk_gated>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; I'm not fond of it. I would rather keep `clocks` and `clock-names` appear as couple to ease the cross-checking. Shawn > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts > index cd08430126887..a99cdb9630ef8 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts > @@ -905,9 +905,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio1 5 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcieclk 0>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcieclk 0>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > index 7d6317d95b131..7d004ffe7d4a6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > @@ -358,9 +358,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi > index 44e87b1568e79..1bbf1c1521415 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi > @@ -212,7 +212,6 @@ &pcie0 { > reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>; > clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_PHY>, > <&clk IMX8MM_CLK_PCIE1_AUX>; > - clock-names = "pcie", "pcie_bus", "pcie_aux"; > fsl,max-link-speed = <1>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > index 4a3df2b77b0be..4344d7b521911 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > @@ -175,9 +175,9 @@ &pcie0 { > assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, > <&clk IMX8MM_SYS_PLL2_250M>; > assigned-clock-rates = <10000000>, <250000000>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&clk IMX8MM_CLK_PCIE1_PHY>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, > + <&clk IMX8MM_CLK_PCIE1_PHY>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie>; > reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > index 7e0aeb2db3054..65b99e201d8f7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > @@ -65,9 +65,8 @@ &pcie_phy { > > &pcie0 { > reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi > index c557dbf4dcd60..0ce60ad9c7d50 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi > @@ -120,9 +120,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi > index 41d0de6a7027b..570992a52b759 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi > @@ -142,9 +142,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi > index 244ef8d6cc688..47ba0be554fa2 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi > @@ -162,9 +162,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts > index 750a1f07ecb7a..2bd117cefef84 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts > @@ -702,9 +702,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts > index 421fd0004eafc..3e203ace11da2 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts > @@ -622,9 +622,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts > index 8ce562246a08e..e7c79a82ab33d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts > @@ -557,9 +557,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts > index eceed9816f5dc..2c44ceefa6ae7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts > @@ -618,9 +618,8 @@ &pcie0 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>; > - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&pcie0_refclk>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, > + <&clk IMX8MM_CLK_PCIE1_AUX>, > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > <&clk IMX8MM_CLK_PCIE1_CTRL>; > assigned-clock-rates = <10000000>, <250000000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > index 0d454e0e2f7c8..ac7af722f240d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > @@ -654,9 +654,8 @@ &pcie0 { > <&clk IMX8MM_SYS_PLL2_250M>; > assigned-clock-rates = <10000000>, <250000000>; > clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, > - <&clk IMX8MM_CLK_PCIE1_AUX>, > - <&clk IMX8MM_CLK_PCIE1_PHY>; > - clock-names = "pcie", "pcie_aux", "pcie_bus"; > + <&clk IMX8MM_CLK_PCIE1_PHY>, > + <&clk IMX8MM_CLK_PCIE1_AUX>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_pcie0>; > /* PCIE_1_RESET# (SODIMM 244) */ > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > index ac51ee6c28fe1..c11fcfc8e58dc 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > @@ -1283,6 +1283,7 @@ pcie0: pcie@33800000 { > <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; > fsl,max-link-speed = <2>; > linux,pci-domain = <0>; > + clock-names = "pcie", "pcie_bus", "pcie_aux"; > power-domains = <&pgc_pcie>; > resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, > <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; > -- > 2.35.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel