From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B685BC4332F for ; Sat, 12 Nov 2022 15:21:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4BfyHDINVCwWBr/A0lYMAkILrfacjc1kw2wZvhuaX4o=; b=aCP84thtmCq24o GusvMUyqrYXoJo73EwYwgKRbXnyGA8kFo8OBplP0nFwl5DHSikwvEQAdvy1jl58ZEkpQk+GmhoXtl wlg81Sb0o/F3i1wI7/bUuBV4T6W3Fcp2ALe3AAkE471HE4Fw1S/tMBNO+QIdmuGxOQ1tMYI1qAlJc fllg6ZDyN2jOTSsUxWqAoRprjyzKpC76fUBvzwjoFpdyzF3ochRfAUPTOR1DWvDwwTWpVps3rMwAO DGcaCd/7J/GMhWX70QZQyvijBj7aAsw/z/ywBdjsb5kCxV6Bn/SSpbbqJ/2IM0rDwIrYsAUqS5hCc qGndAzc/s5zdfngFK/Kw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1otsJO-006L5w-Lp; Sat, 12 Nov 2022 15:20:50 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1otsGs-006JCP-Jn for linux-arm-kernel@lists.infradead.org; Sat, 12 Nov 2022 15:18:16 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3323060BC3; Sat, 12 Nov 2022 15:18:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F384C433D7; Sat, 12 Nov 2022 15:18:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668266293; bh=n2cI2Ryl/K/Hs+xrWGQoTkD5IBBhNXw75Kv5kwvMdWQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K/hVpOltuDPiYePlUwip2Nfkn1iq5MOPmMh6wi/IIZ+bQPguv0tYJBbUoxB0+A27D rDb8KDARC0iwIFx8D9YJjrXBWYgx2iweHR1hxJxXCq9ZUBr6pfxN1xSONZcDlbI40K C9O+o+t2IxUglLO8OAwp6TrQTrULAEi6UA198XJNpK+MV7HK0keOp8ampyJfBKorEa DK6r7am+QPbapL9OjyVeYmeqyHo6s91ULrmrLW6ChKGe/WWUwdB7wnSzcwgbblAE3Y QS9BB4R8uIU85NLUdpkoy0ST+sszOwQwdh8j0PzXplxkOtaTrzGMHPbgwtyGMwl161 54QdK+dl8anTg== From: Mark Brown To: Catalin Marinas , Will Deacon , Marc Zyngier Cc: Lorenzo Pieralisi , Mark Rutland , Sami Mujawar , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Mark Brown Subject: [PATCH v2 10/14] arm64/nmi: Manage masking for superpriority interrupts along with DAIF Date: Sat, 12 Nov 2022 15:17:04 +0000 Message-Id: <20221112151708.175147-11-broonie@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221112151708.175147-1-broonie@kernel.org> References: <20221112151708.175147-1-broonie@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3997; i=broonie@kernel.org; h=from:subject; bh=n2cI2Ryl/K/Hs+xrWGQoTkD5IBBhNXw75Kv5kwvMdWQ=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBjb7jvNhEWyWb+I8gtv1BvP6iwP9rPCXkQUSj4TjI2 67sB5+WJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCY2+47wAKCRAk1otyXVSH0DoeB/ 0cu+7D2eO1FlLwWz4eRBj+q5XeE92P2X6d7RyZtGIu4h5ZTIpmHfbqe49u7mx1Z/s2eY5tFsDCqDSO k4q75p7uoL1/gMzrUktGRqigECIMaGiC8I/jiavBORmt0M2X3oK9FWzWWU+zdNMEkiBOxE+ubWO1Se PPV8BUbPFZSVbejp2Fgn9ubDiPjdPwYNZ+sWCZAkWOWvbN5uNBNUkxdz/P9bjKNBm0ET8HmpOjDcyc 4IuAUrxTxdtO2cVw5S6dKNJhEkJz95M9bui/KGhEwBU3+zYNsDCi9OW7pnzj3AzDuRnLItHyMq81p4 OYOEha7oiTH9TzJSmIZ9xQTWx9i5xv X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221112_071814_743736_7055859B X-CRM114-Status: GOOD ( 18.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As we do for pseudo NMIs add code to our DAIF management which keeps superpriority interrupts unmasked when we have asynchronous exceptions enabled. Since superpriority interrupts are not masked through DAIF like pseduo NMIs are we also need to modify the assembler macros for managing DAIF to ensure that the masking is done in the assembly code. At present users of the assembly macros always mask pseudo NMIs. There is a difference to the actual handling between pseudo NMIs and superpriority interrupts in the assembly save_and_disable_irq and restore_irq macros, these cover both interrupts and FIQs using DAIF without regard for the use of pseudo NMIs so also mask those but are not updated here to mask superpriority interrupts. Given the names it is not clear that the behaviour with pseudo NMIs is particularly intentional, and in any case these macros are only used in the implementation of alternatives for software PAN while hardware PAN has been mandatory since v8.1 so it is not anticipated that practical systems with support for FEAT_NMI will ever execute the affected code. This should be a conservative set of masked regions, we may be able to relax this in future, but this should represent a good starting point. Signed-off-by: Mark Brown --- arch/arm64/include/asm/assembler.h | 11 +++++++++++ arch/arm64/include/asm/daifflags.h | 18 ++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 88d9779a83c0..e85a7e9af9ae 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -52,19 +52,30 @@ alternative_else_nop_endif .macro save_and_disable_daif, flags mrs \flags, daif + disable_allint msr daifset, #0xf .endm .macro disable_daif + disable_allint msr daifset, #0xf .endm .macro enable_daif msr daifclr, #0xf + enable_allint .endm .macro restore_daif, flags:req msr daif, \flags +#ifdef CONFIG_ARM64_NMI +alternative_if ARM64_HAS_NMI + /* If async exceptions are unmasked we can take NMIs */ + tbnz \flags, #8, 2004f + msr_s SYS_ALLINT_CLR, xzr +2004: +alternative_else_nop_endif +#endif .endm /* IRQ/FIQ are the lowest priority flags, unconditionally unmask the rest. */ diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h index b3bed2004342..fda73976068f 100644 --- a/arch/arm64/include/asm/daifflags.h +++ b/arch/arm64/include/asm/daifflags.h @@ -10,6 +10,7 @@ #include #include #include +#include #include #define DAIF_PROCCTX 0 @@ -35,6 +36,9 @@ static inline void local_daif_mask(void) if (system_uses_irq_prio_masking()) gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); + if (system_uses_nmi()) + _allint_set(); + trace_hardirqs_off(); } @@ -50,6 +54,12 @@ static inline unsigned long local_daif_save_flags(void) flags |= PSR_I_BIT | PSR_F_BIT; } + if (system_uses_nmi()) { + /* If IRQs are masked with ALLINT, reflect in in the flags */ + if (read_sysreg_s(SYS_ALLINT) & ALLINT_ALLINT) + flags |= PSR_I_BIT | PSR_F_BIT; + } + return flags; } @@ -114,6 +124,10 @@ static inline void local_daif_restore(unsigned long flags) gic_write_pmr(pmr); } + /* If we can take asynchronous errors we can take NMIs */ + if (system_uses_nmi() && !(flags & PSR_A_BIT)) + _allint_clear(); + write_sysreg(flags, daif); if (irq_disabled) @@ -131,6 +145,10 @@ static inline void local_daif_inherit(struct pt_regs *regs) if (interrupts_enabled(regs)) trace_hardirqs_on(); + /* If we can take asynchronous errors we can take NMIs */ + if (system_uses_nmi() && !(flags & PSR_A_BIT)) + _allint_clear(); + if (system_uses_irq_prio_masking()) gic_write_pmr(regs->pmr_save); -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel