From: Samuel Holland <samuel@sholland.org>
To: Kishon Vijay Abraham I <kishon@kernel.org>,
Vinod Koul <vkoul@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maxime Ripard <mripard@kernel.org>
Cc: Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
linux-sunxi@lists.linux.dev
Subject: [PATCH v2 7/8] phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
Date: Sun, 13 Nov 2022 20:21:12 -0600 [thread overview]
Message-ID: <20221114022113.31694-8-samuel@sholland.org> (raw)
In-Reply-To: <20221114022113.31694-1-samuel@sholland.org>
The A100 variant uses the same values for the timing registers, and it
uses the same final power-on sequence, but it needs a different analog
register configuration in the middle. Support this by moving the
variant-specific parts to a hook provided by the variant.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
(no changes since v1)
drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 59 ++++++++++++---------
1 file changed, 35 insertions(+), 24 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
index a2afedc399fd..ac144ee0f0a6 100644
--- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
@@ -114,7 +114,10 @@ enum sun6i_dphy_direction {
SUN6I_DPHY_DIRECTION_RX,
};
+struct sun6i_dphy;
+
struct sun6i_dphy_variant {
+ void (*tx_power_on)(struct sun6i_dphy *dphy);
bool rx_supported;
};
@@ -156,33 +159,10 @@ static int sun6i_dphy_configure(struct phy *phy, union phy_configure_opts *opts)
return 0;
}
-static int sun6i_dphy_tx_power_on(struct sun6i_dphy *dphy)
+static void sun6i_a31_mipi_dphy_tx_power_on(struct sun6i_dphy *dphy)
{
u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
- regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
- SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT);
-
- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG,
- SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(14) |
- SUN6I_DPHY_TX_TIME0_HS_PREPARE(6) |
- SUN6I_DPHY_TX_TIME0_HS_TRAIL(10));
-
- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME1_REG,
- SUN6I_DPHY_TX_TIME1_CLK_PREPARE(7) |
- SUN6I_DPHY_TX_TIME1_CLK_ZERO(50) |
- SUN6I_DPHY_TX_TIME1_CLK_PRE(3) |
- SUN6I_DPHY_TX_TIME1_CLK_POST(10));
-
- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME2_REG,
- SUN6I_DPHY_TX_TIME2_CLK_TRAIL(30));
-
- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME3_REG, 0);
-
- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME4_REG,
- SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(3) |
- SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(3));
-
regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG,
SUN6I_DPHY_ANA0_REG_PWS |
SUN6I_DPHY_ANA0_REG_DMPC |
@@ -214,6 +194,36 @@ static int sun6i_dphy_tx_power_on(struct sun6i_dphy *dphy)
SUN6I_DPHY_ANA3_EN_LDOC |
SUN6I_DPHY_ANA3_EN_LDOD);
udelay(1);
+}
+
+static int sun6i_dphy_tx_power_on(struct sun6i_dphy *dphy)
+{
+ u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
+ SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT);
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG,
+ SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(14) |
+ SUN6I_DPHY_TX_TIME0_HS_PREPARE(6) |
+ SUN6I_DPHY_TX_TIME0_HS_TRAIL(10));
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME1_REG,
+ SUN6I_DPHY_TX_TIME1_CLK_PREPARE(7) |
+ SUN6I_DPHY_TX_TIME1_CLK_ZERO(50) |
+ SUN6I_DPHY_TX_TIME1_CLK_PRE(3) |
+ SUN6I_DPHY_TX_TIME1_CLK_POST(10));
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME2_REG,
+ SUN6I_DPHY_TX_TIME2_CLK_TRAIL(30));
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME3_REG, 0);
+
+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME4_REG,
+ SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(3) |
+ SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(3));
+
+ dphy->variant->tx_power_on(dphy);
regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA3_REG,
SUN6I_DPHY_ANA3_EN_VTTC |
@@ -470,6 +480,7 @@ static int sun6i_dphy_probe(struct platform_device *pdev)
}
static const struct sun6i_dphy_variant sun6i_a31_mipi_dphy_variant = {
+ .tx_power_on = sun6i_a31_mipi_dphy_tx_power_on,
.rx_supported = true,
};
--
2.37.3
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next prev parent reply other threads:[~2022-11-14 2:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 2:21 [PATCH v2 0/8] phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY Samuel Holland
2022-11-14 2:21 ` [PATCH v2 1/8] dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property Samuel Holland
2022-11-14 8:24 ` Krzysztof Kozlowski
2022-11-14 2:21 ` [PATCH v2 2/8] ARM: dts: sun8i: a33: Add DPHY interrupt Samuel Holland
2022-11-14 2:21 ` [PATCH v2 3/8] arm64: dts: allwinner: a64: " Samuel Holland
2022-11-14 2:21 ` [PATCH v2 4/8] dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant Samuel Holland
2022-11-14 2:21 ` [PATCH v2 5/8] phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional Samuel Holland
2022-11-14 2:21 ` [PATCH v2 6/8] phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last Samuel Holland
2022-11-14 2:21 ` Samuel Holland [this message]
2022-11-14 2:21 ` [PATCH v2 8/8] phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant Samuel Holland
2022-11-24 17:34 ` [PATCH v2 0/8] phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY Vinod Koul
2023-01-08 20:26 ` Jernej Škrabec
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