[PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset

[PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset

[Sascha Hauer]

When the PHY is the reference clock provider then it must be initialized
and powered on before the reset on the client is deasserted, otherwise
the link will never come up. The order was changed in cf236e0c0d59.
Restore the correct order to make the driver work again on boards where
the PHY provides the reference clock. This also changes the order for
boards where the Soc is the PHY reference clock divider, but this
shouldn't do any harm.

Fixes: cf236e0c0d59 ("PCI: imx6: Do not hide PHY driver callbacks and refine the error handling")
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---

Notes:
    Changes since v1:
    - Change subject
    - s/phy/PHY/
    - Add explanation that the order is also changed for boards where the
      SoC is the PHY reference clock provider

 drivers/pci/controller/dwc/pci-imx6.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2616585ca5f8a..1dde5c579edc8 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -952,12 +952,6 @@ static int imx6_pcie_host_init(struct dw_pcie_rp *pp)
 		}
 	}
 
-	ret = imx6_pcie_deassert_core_reset(imx6_pcie);
-	if (ret < 0) {
-		dev_err(dev, "pcie deassert core reset failed: %d\n", ret);
-		goto err_phy_off;
-	}
-
 	if (imx6_pcie->phy) {
 		ret = phy_power_on(imx6_pcie->phy);
 		if (ret) {
@@ -965,6 +959,13 @@ static int imx6_pcie_host_init(struct dw_pcie_rp *pp)
 			goto err_phy_off;
 		}
 	}
+
+	ret = imx6_pcie_deassert_core_reset(imx6_pcie);
+	if (ret < 0) {
+		dev_err(dev, "pcie deassert core reset failed: %d\n", ret);
+		goto err_phy_off;
+	}
+
 	imx6_setup_phy_mpll(imx6_pcie);
 
 	return 0;
-- 
2.30.2


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Re: [PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset

[Lorenzo Pieralisi]

On Tue, 1 Nov 2022 10:57:14 +0100, Sascha Hauer wrote:
> When the PHY is the reference clock provider then it must be initialized
> and powered on before the reset on the client is deasserted, otherwise
> the link will never come up. The order was changed in cf236e0c0d59.
> Restore the correct order to make the driver work again on boards where
> the PHY provides the reference clock. This also changes the order for
> boards where the Soc is the PHY reference clock divider, but this
> shouldn't do any harm.
> 
> [...]

Applied to pci/dwc, thanks!

[1/1] PCI: imx6: Initialize PHY before deasserting core reset
      https://git.kernel.org/lpieralisi/pci/c/ae6b9a65af48

Thanks,
Lorenzo

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Re: [PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset

[Bjorn Helgaas]

On Fri, Nov 11, 2022 at 04:57:46PM +0100, Lorenzo Pieralisi wrote:
> On Tue, 1 Nov 2022 10:57:14 +0100, Sascha Hauer wrote:
> > When the PHY is the reference clock provider then it must be initialized
> > and powered on before the reset on the client is deasserted, otherwise
> > the link will never come up. The order was changed in cf236e0c0d59.
> > Restore the correct order to make the driver work again on boards where
> > the PHY provides the reference clock. This also changes the order for
> > boards where the Soc is the PHY reference clock divider, but this
> > shouldn't do any harm.
> > 
> > [...]
> 
> Applied to pci/dwc, thanks!
> 
> [1/1] PCI: imx6: Initialize PHY before deasserting core reset
>       https://git.kernel.org/lpieralisi/pci/c/ae6b9a65af48

cf236e0c0d59 appeared in v6.0; should we add a stable tag to this?

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Re: [PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset

[Sascha Hauer]

On Fri, Nov 11, 2022 at 03:53:01PM -0600, Bjorn Helgaas wrote:
> On Fri, Nov 11, 2022 at 04:57:46PM +0100, Lorenzo Pieralisi wrote:
> > On Tue, 1 Nov 2022 10:57:14 +0100, Sascha Hauer wrote:
> > > When the PHY is the reference clock provider then it must be initialized
> > > and powered on before the reset on the client is deasserted, otherwise
> > > the link will never come up. The order was changed in cf236e0c0d59.
> > > Restore the correct order to make the driver work again on boards where
> > > the PHY provides the reference clock. This also changes the order for
> > > boards where the Soc is the PHY reference clock divider, but this
> > > shouldn't do any harm.
> > > 
> > > [...]
> > 
> > Applied to pci/dwc, thanks!
> > 
> > [1/1] PCI: imx6: Initialize PHY before deasserting core reset
> >       https://git.kernel.org/lpieralisi/pci/c/ae6b9a65af48
> 
> cf236e0c0d59 appeared in v6.0; should we add a stable tag to this?

Good idea, yes.

Sascha

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