From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0192AC433FE for ; Tue, 15 Nov 2022 11:18:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EIn2T4ctaG2uvRXSLjfvKHb0bUvIY68jmr7+FMVfGRs=; b=L8EzqbCQJ6Texr tR42XCfXZP8e1XIYOZx8sMDVanx3GcZFE6wVoaCQXkBT5UD5u5oRUX1/CpOsE10Rq/ZY9os/ruh9M eKX2AkCXISH/wCniIieT3hRRwPAHubilmccK0DIBqyed8hZg+AwHq25hy1o95ANVw8TmQMlBxaRC8 YE/ycnxR1AgToPTmsQpGXWqGHL4aoAj/fQ/Y66g0si6yYD18Jbku6cm9NzDUpjwfoob7CuGZfKs46 Q0N9sv4c++BR8SKehv5XzplnoKB+CKSDQMjJ4rSWGpL8GOsGknOR1hASWzkRri7YarJLxCvnx3KGt AllCiwHPrIMQWirByDRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1outwG-00AST5-2n; Tue, 15 Nov 2022 11:17:12 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1outwB-00ASQU-AW for linux-arm-kernel@lists.infradead.org; Tue, 15 Nov 2022 11:17:09 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 77F83616B5; Tue, 15 Nov 2022 11:17:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7367BC433D6; Tue, 15 Nov 2022 11:17:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668511025; bh=NMScK8aB29AuO1YZaSUj0lXpS/m6IsmLF61BjgXSc3M=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LhbsDZNmofRhtzQqQuIrDDdZIbU+S4xV9vtonPajkieSh3x2eaWiqtxJo6x5u9xQX 4oU+L4+wD+xJN9wLFt0a3oRw1+AC5Q5F/17pZM6r0zZkn3SKFQrHOkmN3Jv+7w9Ja7 1yh03HpUTjBL3WkPOvAUAwOTd1sc2OUJhd+hHzEk2izvE/aR5kkLmrAP4z/xpldqgl Y8tofix5KHgr/xKccbVxVCB8IOxDWEYuT5h/u94rNkcApoM7EQNhtT9pJKMl4H5pTO BOpkcDmBEsTHFyItJ6XKeWZY9o0lCw+obDdu9SktldoxnIDJ5/xbaoR40nfuI05dyj zifekriLgEpbA== Date: Tue, 15 Nov 2022 11:17:00 +0000 From: Will Deacon To: Mark Rutland Cc: Ard Biesheuvel , linux-arm-kernel@lists.infradead.org, linux-efi@vger.kernel.org, keescook@chromium.org, Catalin Marinas , Marc Zyngier Subject: Re: [PATCH v5 0/7] arm64: efi: leave MMU and caches on at boot Message-ID: <20221115111658.GA32523@willie-the-truck> References: <20221108182204.2447664-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221115_031707_432431_AD4D2992 X-CRM114-Status: GOOD ( 26.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Nov 11, 2022 at 05:36:19PM +0000, Mark Rutland wrote: > On Tue, Nov 08, 2022 at 07:21:57PM +0100, Ard Biesheuvel wrote: > > The purpose of this series is to remove any explicit cache maintenance > > for coherency during early boot that becomes unnecessary if we simply > > retain the cacheable 1:1 mapping of all of system RAM provided by EFI, > > and use it to populate the ID map page tables. After setting up this > > preliminary ID map, we disable the MMU, drop to EL1, reprogram the MAIR, > > TCR and SCTLR registers as before, and proceed as usual, avoiding the > > need for any manipulations of memory while the MMU and caches are off. > > > > The only properties of the firmware provided 1:1 map we rely on is that > > it does not require any explicit cache maintenance for coherency, and > > that it covers the entire memory footprint of the image, including the > > BSS and padding at the end - all else is under control of the kernel > > itself, as before. > > As a high-level thing, I'm still very much not keen on entering the kernel with > the MMU on. Given that we have to support booting with the MMU off for !EFI > boot (including kexec when EFI is in use), I think this makes it harder to > reason about the boot code overall (e.g. due to the conditional maintenance > added to head.S), and adds more scope for error, even if it simplifies the EFI > stub itself. As discussed offline, two things that would help the current series are: (1) Some performance numbers comparing MMU off vs MMU on boot (2) Use of a separate entry point for the MMU on case, potentially failing the boot if the MMU is on and we're not using EFI Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel