From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4245FC433FE for ; Tue, 15 Nov 2022 13:43:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2PIuGpr89R6E1HwfFyMy1DWNmcsPR3ISH5BtukeRF18=; b=3T6yhBcT27M2R8 C5rkaNL2nO/vzLvLzcY9Moa5thmj1M2z07TBxGhyI3Pw1cOl570UUpKOgVOhLr/iJo9/2g5KTehc/ UsmiHO/6gEdnQLSO6jQ3AwonGqY4ge50bDIs6zO5E2fchp+ZxlPu3yjhGS/LXl3K4m/zwATKIIlZf oZXuBWR5xnqW+UY+anRR8FQkdO4mghXf9bGMLjYLc58xv1dqatWl6yNh8pO/wUKLJ/0HQEje9P32Q 1JVR2ho33Ua93OSn81pK1rbqZGz5rOsJ+uJ+DYtmThCCDWGa76FlT/9WnzCM1OIAChQF5usrcyfQS tln5YhaZmyL6gxEbDEiQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ouwD3-00BXDz-K8; Tue, 15 Nov 2022 13:42:41 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ouwCz-00BXBf-QY for linux-arm-kernel@lists.infradead.org; Tue, 15 Nov 2022 13:42:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 78874B80B31; Tue, 15 Nov 2022 13:42:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 72EEEC433D6; Tue, 15 Nov 2022 13:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668519753; bh=xHg3G395U98Mtabx7NVsrASIF/dX0dl0qNOXLK3KOTI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=liQxIWNpicfA25wBWONZ7cL9EJvz3sxD4CNmKzpBV3aybNTotJhJrQhrUukDkuzEL 97siY3fsyD9xazMtE8tH+DDLR6k86yuO75G4xm35SXUFG3mWgLjl4Uhm0velhlPHB1 wwaFlte4uekp2sTAE4kz234fiY+hCARhibqDWwlngg1e7kywNxuUvDEBaeEJhWypNh 2kffWPG7vL+2bKYfOxSVVmiIEhLVWhMVxP53vQvHs2JeQwS7JpjQf2GfUbnWmc9AOV /NoHbZ8zupGdw9t382H4VSs4aKXGGMMU0ubTlkFTLRPpblyEgt5ltYL/+DXDAJ1zb0 XsFyX+wUy7oSA== Date: Tue, 15 Nov 2022 13:42:27 +0000 From: Will Deacon To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, Suzuki K Poulose , James Morse , Jonathan Corbet , Mark Rutland , linux-doc@vger.kernel.org Subject: Re: [PATCH V2 2/2] arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruption Message-ID: <20221115134226.GD524@willie-the-truck> References: <20221113012645.190301-1-anshuman.khandual@arm.com> <20221113012645.190301-3-anshuman.khandual@arm.com> <20221115133854.GC524@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221115133854.GC524@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221115_054238_162120_40073DB5 X-CRM114-Status: GOOD ( 33.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Nov 15, 2022 at 01:38:54PM +0000, Will Deacon wrote: > On Sun, Nov 13, 2022 at 06:56:45AM +0530, Anshuman Khandual wrote: > > If a Cortex-A715 cpu sees a page mapping permissions change from executable > > to non-executable, it may corrupt the ESR_ELx and FAR_ELx registers, on the > > next instruction abort caused by permission fault. > > > > Only user-space does executable to non-executable permission transition via > > mprotect() system call which calls ptep_modify_prot_start() and ptep_modify > > _prot_commit() helpers, while changing the page mapping. The platform code > > can override these helpers via __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION. > > > > Work around the problem via doing a break-before-make TLB invalidation, for > > all executable user space mappings, that go through mprotect() system call. > > This overrides ptep_modify_prot_start() and ptep_modify_prot_commit(), via > > defining HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION on the platform thus giving > > an opportunity to intercept user space exec mappings, and do the necessary > > TLB invalidation. Similar interceptions are also implemented for HugeTLB. > > > > Cc: Catalin Marinas > > Cc: Will Deacon > > Cc: Jonathan Corbet > > Cc: Mark Rutland > > Cc: linux-arm-kernel@lists.infradead.org > > Cc: linux-doc@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > Signed-off-by: Anshuman Khandual > > --- > > Documentation/arm64/silicon-errata.rst | 2 ++ > > arch/arm64/Kconfig | 16 ++++++++++++++++ > > arch/arm64/include/asm/hugetlb.h | 9 +++++++++ > > arch/arm64/include/asm/pgtable.h | 9 +++++++++ > > arch/arm64/kernel/cpu_errata.c | 7 +++++++ > > arch/arm64/mm/hugetlbpage.c | 21 +++++++++++++++++++++ > > arch/arm64/mm/mmu.c | 21 +++++++++++++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 8 files changed, 86 insertions(+) > > [...] > > > diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c > > index 9a7c38965154..c1fb0ce1473c 100644 > > --- a/arch/arm64/mm/mmu.c > > +++ b/arch/arm64/mm/mmu.c > > @@ -1702,3 +1702,24 @@ static int __init prevent_bootmem_remove_init(void) > > } > > early_initcall(prevent_bootmem_remove_init); > > #endif > > + > > +pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) > > +{ > > + if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_2645198)) { > > + pte_t pte = READ_ONCE(*ptep); > > + /* > > + * Break-before-make (BBM) is required for all user space mappings > > + * when the permission changes from executable to non-executable > > + * in cases where cpu is affected with errata #2645198. > > + */ > > + if (pte_user_exec(pte) && cpus_have_const_cap(ARM64_WORKAROUND_2645198)) > > + return ptep_clear_flush(vma, addr, ptep); > > + } > > + return ptep_get_and_clear(vma->vm_mm, addr, ptep); > > +} > > + > > +void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, > > + pte_t old_pte, pte_t pte) > > +{ > > + __set_pte_at(vma->vm_mm, addr, ptep, pte); > > +} > > So these are really similar to the generic copies and, in looking at > change_pte_range(), it appears that we already invalidate the TLB, it just > happens _after_ writing the new version. > > So with your change, I think we end up invalidating twice. Can we instead > change the generic code to invalidate the TLB before writing the new entry? Bah, scratch that, the invalidations are all batched, aren't they? It just seems silly that we have to add all this code just to do a TLB invalidation. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel