From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47EC5C433FE for ; Mon, 28 Nov 2022 08:41:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SXRL3c310mS7WOn3BiKma5ypRML3mO73gKx2l3/E6aY=; b=Z5Er2Y+hn6gLvx nsdnu5LcnP937kWmAkugkNnaQ8Ut1t9pqGO480Ydqk78QRNZBNir1m9Zzzf4aTf1wlPiuCAGtdZf4 oML1iYsYPoDr9H3VJWsmOrxUJEDTPs2FKXXLsKPnJjr7x61FX30oAZaXDorBIjPxqwz7sN/FCFu/H dkzg8HKyyjUkR9y9A1eQjgSaCtfkBkge2ZKmGs3riYjNb85b7z/KJtnN/+aJt9oUfeSyvubrKXFhc f2KKnhBfg3HzQOaOlC8n6Y0WVzw+83ftsMy6W+wJmJF5EPls/QCvBjbAwtDIXpn55plT2PBpS3m+3 lzD2ydnPaJhilRc6QgrQ==; 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x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221128_004005_840428_BF1E8A87 X-CRM114-Status: GOOD ( 29.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Russell, On Sun, 27 Nov 2022 17:34:53 +0000 "Russell King (Oracle)" wrote: > On Fri, Nov 25, 2022 at 02:17:58PM +0100, Maxime Chevallier wrote: > > Hello everyone, > > > > This small series does a bit of code cleanup in the altera TSE pcs > > driver, removong unused register definitions, handling 1000BaseX > > speed configuration correctly according to the datasheet, and > > making use of proper poll_timeout helpers. > > > > No functional change is introduced. > > > > Best regards, > > > > Maxime > > > > Maxime Chevallier (3): > > net: pcs: altera-tse: use read_poll_timeout to wait for reset > > net: pcs: altera-tse: don't set the speed for 1000BaseX > > net: pcs: altera-tse: remove unnecessary register definitions > > Hi Maxime, > > Please can you check the link timer settings: > > /* Set link timer to 1.6ms, as per the MegaCore Function User > Guide */ tse_pcs_write(tse_pcs, SGMII_PCS_LINK_TIMER_0, 0x0D40); > tse_pcs_write(tse_pcs, SGMII_PCS_LINK_TIMER_1, 0x03); > > This is true for Cisco SGMII mode - which is specified to use a 1.6ms > link timer, but 1000baseX is specified by 802.3 to use a 10ms link > timer interval, so this is technically incorrect for 1000base-X. So, > if the MegaCore Function User Guide specifies 1.6ms for everything, it > would appear to contradict 802.3. > > From what I gather from the above, the link timer uses a value of > 200000 for 1.6ms, which means it is using a 8ns clock period or > 125MHz. > > If you wish to correct the link timer, you can use this: > > int link_timer; > > link_timer = phylink_get_link_timer_ns(interface) / 8; > if (link_timer > 0) { > tse_pcs_write(tse_pcs, SGMII_PCS_LINK_TIMER_0, > link_timer); tse_pcs_write(tse_pcs, SGMII_PCS_LINK_TIMER_1, > link_timer >> 16); } > > so that it gets set correctly depending on 'interface'. > phylink_get_link_timer_ns() is an inline static function, so you > should end up with the above fairly optimised, not that it really > matters. Also worth documenting that the "8" there is 125MHz in > nanoseconds - maybe in a similar way to pcs-lynx does. Ouh that's perfect, thanks ! > It does look like this Altera TSE PCS is very similar to pcs-lynx, > maybe there's a possibility of refactoring both drivers to share > code? Indeed, I've some patches I'm testing to port pcs-lynx to regmap then do the merge. The one thing that would differ is the reset handling in the TSE driver, since we need to perform it at every configuration change basically. But that's not worth having duplicate drivers just for that, I agree. I'll post that merge when I'll have the chance to give it a more thourough test. Thanks, Maxime _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel