From: James Morse <james.morse@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Mark Brown <broonie@kernel.org>, Will Deacon <will@kernel.org>,
James Morse <james.morse@arm.com>
Subject: [PATCH v2 28/38] arm64/sysreg: Convert ID_ISAR6_EL1 to automatic generation
Date: Wed, 30 Nov 2022 17:16:27 +0000 [thread overview]
Message-ID: <20221130171637.718182-29-james.morse@arm.com> (raw)
In-Reply-To: <20221130171637.718182-1-james.morse@arm.com>
Convert ID_ISAR6_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
---
arch/arm64/include/asm/sysreg.h | 10 ----------
arch/arm64/tools/sysreg | 32 ++++++++++++++++++++++++++++++++
2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 04a6e44427a9..03f38890cb2b 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -173,8 +173,6 @@
#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
#define SYS_ID_MMFR5_EL1 sys_reg(3, 0, 0, 3, 6)
-#define SYS_ID_ISAR6_EL1 sys_reg(3, 0, 0, 2, 7)
-
#define SYS_MVFR0_EL1 sys_reg(3, 0, 0, 3, 0)
#define SYS_MVFR1_EL1 sys_reg(3, 0, 0, 3, 1)
#define SYS_MVFR2_EL1 sys_reg(3, 0, 0, 3, 2)
@@ -688,14 +686,6 @@
#define ID_DFR1_EL1_MTPMU_SHIFT 0
-#define ID_ISAR6_EL1_I8MM_SHIFT 24
-#define ID_ISAR6_EL1_BF16_SHIFT 20
-#define ID_ISAR6_EL1_SPECRES_SHIFT 16
-#define ID_ISAR6_EL1_SB_SHIFT 12
-#define ID_ISAR6_EL1_FHM_SHIFT 8
-#define ID_ISAR6_EL1_DP_SHIFT 4
-#define ID_ISAR6_EL1_JSCVT_SHIFT 0
-
#define ID_MMFR5_EL1_ETS_SHIFT 0
#define ID_PFR0_EL1_DIT_SHIFT 24
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 43e765a2c68f..aa6b3f5316f0 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -455,6 +455,38 @@ Enum 3:0 SEVL
EndEnum
EndSysreg
+Sysreg ID_ISAR6_EL1 3 0 0 2 7
+Res0 63:28
+Enum 27:24 I8MM
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 23:20 BF16
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 19:16 SPECRES
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 15:12 SB
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 11:8 FHM
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 7:4 DP
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 3:0 JSCVT
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+EndSysreg
+
Sysreg ID_MMFR4_EL1 3 0 0 2 6
Res0 63:32
Enum 31:28 EVT
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-11-30 17:42 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-30 17:15 [PATCH v2 00/38] arm64/sysreg: Convert aarch32 id regs James Morse
2022-11-30 17:16 ` [PATCH v2 01/38] arm64/sysreg: Standardise naming for ID_MMFR0_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 02/38] arm64/sysreg: Standardise naming for ID_MMFR4_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 03/38] arm64/sysreg: Standardise naming for ID_MMFR5_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 04/38] arm64/sysreg: Standardise naming for ID_ISAR0_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 05/38] arm64/sysreg: Standardise naming for ID_ISAR4_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 06/38] arm64/sysreg: Standardise naming for ID_ISAR5_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 07/38] arm64/sysreg: Standardise naming for ID_ISAR6_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 08/38] arm64/sysreg: Standardise naming for ID_PFR0_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 09/38] arm64/sysreg: Standardise naming for ID_PFR1_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 10/38] arm64/sysreg: Standardise naming for ID_PFR2_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 11/38] arm64/sysreg: Standardise naming for ID_DFR0_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 12/38] arm64/sysreg: Standardise naming for ID_DFR1_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 13/38] arm64/sysreg: Standardise naming for MVFR0_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 14/38] arm64/sysreg: Standardise naming for MVFR1_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 15/38] arm64/sysreg: Standardise naming for MVFR2_EL1 James Morse
2022-11-30 17:16 ` [PATCH v2 16/38] arm64/sysreg: Extend the maximum width of a register and symbol name James Morse
2022-11-30 17:16 ` [PATCH v2 17/38] arm64/sysreg: Convert ID_MMFR0_EL1 to automatic generation James Morse
2022-11-30 17:16 ` [PATCH v2 18/38] arm64/sysreg: Convert ID_MMFR1_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 19/38] arm64/sysreg: Convert ID_MMFR2_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 20/38] arm64/sysreg: Convert ID_MMFR3_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 21/38] arm64/sysreg: Convert ID_MMFR4_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 22/38] arm64/sysreg: Convert ID_ISAR0_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 23/38] arm64/sysreg: Convert ID_ISAR1_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 24/38] arm64/sysreg: Convert ID_ISAR2_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 25/38] arm64/sysreg: Convert ID_ISAR3_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 26/38] arm64/sysreg: Convert ID_ISAR4_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 27/38] arm64/sysreg: Convert ID_ISAR5_EL1 " James Morse
2022-11-30 17:16 ` James Morse [this message]
2022-11-30 17:16 ` [PATCH v2 29/38] arm64/sysreg: Convert ID_PFR0_EL1 " James Morse
2022-11-30 19:07 ` Mark Brown
2022-11-30 17:16 ` [PATCH v2 30/38] arm64/sysreg: Convert ID_PFR1_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 31/38] arm64/sysreg: Convert ID_PFR2_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 32/38] arm64/sysreg: Convert MVFR0_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 33/38] arm64/sysreg: Convert MVFR1_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 34/38] arm64/sysreg: Convert MVFR2_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 35/38] arm64/sysreg: Convert ID_MMFR5_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 36/38] arm64/sysreg: Convert ID_AFR0_EL1 " James Morse
2022-11-30 17:16 ` [PATCH v2 37/38] arm64/sysreg: Convert ID_DFR0_EL1 " James Morse
2022-11-30 19:08 ` Mark Brown
2022-11-30 17:16 ` [PATCH v2 38/38] arm64/sysreg: Convert ID_DFR1_EL1 " James Morse
2022-12-01 17:00 ` [PATCH v2 00/38] arm64/sysreg: Convert aarch32 id regs Will Deacon
2022-12-02 11:17 ` Will Deacon
2022-12-02 15:52 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221130171637.718182-29-james.morse@arm.com \
--to=james.morse@arm.com \
--cc=broonie@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).