* [PATCH] arm64/cpufeature: Remove 4 bit assumption in ARM64_FEATURE_MASK()
@ 2022-12-27 13:00 Mark Brown
2023-01-12 17:49 ` Catalin Marinas
0 siblings, 1 reply; 2+ messages in thread
From: Mark Brown @ 2022-12-27 13:00 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon
Cc: Marc Zyngier, Suzuki K Poulose, linux-arm-kernel, linux-kernel,
Mark Brown
The ARM64_FEATURE_MASK(), used extensively by KVM, assumes that all ID
register fields are 4 bits wide but this is not the case any more, for
example there are several 1 bit fields in ID_AA64SMFR0_EL1. Fortunately
we now have generated constants for all the ID mask registers which can
be used instead. Rather than create churn from updating existing users
update the macro to reference the generated constants and replace the
comment with a note advising against adding new users.
There are also users of ARM64_FEATURE_FIELD_BITS in the pKVM code which
will need to be fixed separately, since no relevant feature is planned to
be exposed to protected guests in the immediate future there is no
immediate issue with them assuming fields are 4 bits wide.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1312fb48f18b..1c2bd78f03d3 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -809,8 +809,8 @@
#define ARM64_FEATURE_FIELD_BITS 4
-/* Create a mask for the feature bits of the specified feature. */
-#define ARM64_FEATURE_MASK(x) (GENMASK_ULL(x##_SHIFT + ARM64_FEATURE_FIELD_BITS - 1, x##_SHIFT))
+/* Defined for compatibility only, do not add new users. */
+#define ARM64_FEATURE_MASK(x) (x##_MASK)
#ifdef __ASSEMBLY__
---
base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2
change-id: 20221222-arm64-arm64-feature-mask-a4bca4fa4bce
Best regards,
--
Mark Brown <broonie@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64/cpufeature: Remove 4 bit assumption in ARM64_FEATURE_MASK()
2022-12-27 13:00 [PATCH] arm64/cpufeature: Remove 4 bit assumption in ARM64_FEATURE_MASK() Mark Brown
@ 2023-01-12 17:49 ` Catalin Marinas
0 siblings, 0 replies; 2+ messages in thread
From: Catalin Marinas @ 2023-01-12 17:49 UTC (permalink / raw)
To: Will Deacon, Mark Brown
Cc: Marc Zyngier, Suzuki K Poulose, linux-arm-kernel, linux-kernel
On Tue, 27 Dec 2022 13:00:39 +0000, Mark Brown wrote:
> The ARM64_FEATURE_MASK(), used extensively by KVM, assumes that all ID
> register fields are 4 bits wide but this is not the case any more, for
> example there are several 1 bit fields in ID_AA64SMFR0_EL1. Fortunately
> we now have generated constants for all the ID mask registers which can
> be used instead. Rather than create churn from updating existing users
> update the macro to reference the generated constants and replace the
> comment with a note advising against adding new users.
>
> [...]
Applied to arm64 (for-next/sysreg), thanks!
[1/1] arm64/cpufeature: Remove 4 bit assumption in ARM64_FEATURE_MASK()
https://git.kernel.org/arm64/c/e978eaca4bee
--
Catalin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-01-12 17:51 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-12-27 13:00 [PATCH] arm64/cpufeature: Remove 4 bit assumption in ARM64_FEATURE_MASK() Mark Brown
2023-01-12 17:49 ` Catalin Marinas
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).