From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7F76C10F1B for ; Fri, 30 Dec 2022 04:01:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=tJ0ib98uQlxtKshBlsO3DIsHkK4Dk9TMUim99J2mmss=; b=fIUdnT50rDpw65iL+Ie5nqvL7L 2qqPKbhdz1SR1a8IhXwrFuQ1ICIZUs5n4BbHmVHCVR+/NDnHadgaIUatVHxb/j8/TpV75oI4Hjefx bhdfYRMZmygcAUo2RNQX2moMNuOoGWJfThR1KrrmlFLHRLg5N9NPZ7r1wavnhld3k0lRrHG7QLsTI s4vobuj2ZZATQt6bMaFq5LvIeYGoXVlndds8MevM0BV4ZL7Fm7EO1xJn6IR5vSxq73eq+zm2RkK2H LMpauhReGVHuyagtCefH5uQyqkYKe6zDgo/CZSTbE3SlT5khNkOZ9x+mXUw8mbKoEcWvd1HvEPNiv +grA26xw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pB6Z5-005Dqj-6q; Fri, 30 Dec 2022 04:00:15 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pB6Yo-005Dk3-JH for linux-arm-kernel@lists.infradead.org; Fri, 30 Dec 2022 04:00:00 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-352e29ff8c2so221701897b3.21 for ; Thu, 29 Dec 2022 19:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=1SYJm5JNDxkav0WQdwJtR7PUOPOmz+q4dcky77gCOc4=; b=CtHYSYoomRsxseLmDPzoqoYHK094uDWmtIS+mcaBfAMl4yXR5g8VvBGT+MP6t9oVov a7PMNLphXcn50C3qT+lfvc86bTtQBxmJzuDt3A1P1JPNUHfkNdt3cIipk30Vt0EkngPY za8KN0Y1mKLDUoz8v4G9pypXDzoh4uHowtMnT1cMXmz9SVcRus/mD/E96IBCEyzG4bTA UYhWbRv5mfP0Qmp0qs82nydtru1j10DmfPh8Kda+DT/l3xUOjGh8jRz/vmRI0pTGM/fD GVwUJ7kNTbgFNdAPtnVYy4ro1xK2t0WCDCSq0CDkMVO0sISbxm/ep2kuVZTx+33YOS8Z aObQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=1SYJm5JNDxkav0WQdwJtR7PUOPOmz+q4dcky77gCOc4=; b=hIE8fRrzbE3JgtS7qWCOXrSRQ6UG8woKgZe70GpU7O2pQD4tVpFOrkeGjeSllBQ3Ga Bkj+BP3FIQg5qhPWN0ZF4WZDN/jiW9E4huq/81pz7fVjWmhCVoO4OhuXUloLTYTdTYw8 4UNd+JELzr6APhzBisr9CSWSJCsAey3U7h8vpcKBhkB4rsHsimU4SOriHJXYrId6NdRd Ev6d4ibEYbxio1kt9Q2tEviUjd/92F9IJkp5IBDBgNx5wrIu+NuuEdt0wk5+lqZSrPP/ hliJMuBSRy9Ba9E8h1Knvr3FDsA7G1PrCQOtGxLV4w6rIFTMyXTtDAK+y+r+s4xfX06s QHSw== X-Gm-Message-State: AFqh2kpOBWRfkC/tsdqGASV0hXHLNNbASwPz4ebeZPK7dGTeYSmba8zQ kahSM20pRINej3JkDpxvIksCbWq8yg0= X-Google-Smtp-Source: AMrXdXvLdndaUF+C3AnEdTc8eaJR11ktcamnCwVT3vgAxLC0xCEa4lAK5Ji3iCN6FUO1z3ovO0zq7Y46r0A= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a81:dd1:0:b0:3bd:370d:aa42 with SMTP id 200-20020a810dd1000000b003bd370daa42mr3445113ywn.497.1672372796597; Thu, 29 Dec 2022 19:59:56 -0800 (PST) Date: Thu, 29 Dec 2022 19:59:22 -0800 In-Reply-To: <20221230035928.3423990-1-reijiw@google.com> Mime-Version: 1.0 References: <20221230035928.3423990-1-reijiw@google.com> X-Mailer: git-send-email 2.39.0.314.g84b9a713c41-goog Message-ID: <20221230035928.3423990-2-reijiw@google.com> Subject: [PATCH 1/7] KVM: arm64: PMU: Have reset_pmu_reg() to clear a register From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221229_195958_681722_D8764065 X-CRM114-Status: GOOD ( 13.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On vCPU reset, PMCNTEN{SET,CLR}_EL1 and PMOVS{SET,CLR}_EL1 for a vCPU are reset by reset_pmu_reg(). This function clears RAZ bits of those registers corresponding to unimplemented event counters on the vCPU, and sets bits corresponding to implemented event counters to a predefined pseudo UNKNOWN value (some bits are set to 1). The function identifies (un)implemented event counters on the vCPU based on the PMCR_EL1.N value on the host. Using the host value for this would be problematic when KVM supports letting userspace set PMCR_EL1.N to a value different from the host value (some of the RAZ bits of those registers could end up being set to 1). Fix reset_pmu_reg() to clear the registers so that it can ensure that all the RAZ bits are cleared even when the PMCR_EL1.N value for the vCPU is different from the host value. Signed-off-by: Reiji Watanabe --- arch/arm64/kvm/sys_regs.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c6cbfe6b854b..ec4bdaf71a15 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -604,19 +604,11 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu, static void reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { - u64 n, mask = BIT(ARMV8_PMU_CYCLE_IDX); - /* No PMU available, any PMU reg may UNDEF... */ if (!kvm_arm_support_pmu_v3()) return; - n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT; - n &= ARMV8_PMU_PMCR_N_MASK; - if (n) - mask |= GENMASK(n - 1, 0); - - reset_unknown(vcpu, r); - __vcpu_sys_reg(vcpu, r->reg) &= mask; + __vcpu_sys_reg(vcpu, r->reg) = 0; } static void reset_pmevcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) -- 2.39.0.314.g84b9a713c41-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel