* [PATCH v3 2/5] soc: imx: add Kconfig symbols for blk-ctrl drivers
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
@ 2022-12-16 20:08 ` Lucas Stach
2022-12-16 20:08 ` [PATCH v3 3/5] soc: imx: imx8mp-blk-ctrl: add instance specific probe function Lucas Stach
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Lucas Stach @ 2022-12-16 20:08 UTC (permalink / raw)
To: Shawn Guo
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
Currently the dependencies of the blk-ctrl drivers are not fully
described in Kconfig, which can trip over the compile tests on
platforms where those drivers are not usually enabled. Add a
non user-selectable symbol to be describe those dependencies.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
v3: new patch
---
drivers/soc/imx/Kconfig | 10 ++++++++++
drivers/soc/imx/Makefile | 6 +++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
index 4b906791d6c7..179bcc896ea2 100644
--- a/drivers/soc/imx/Kconfig
+++ b/drivers/soc/imx/Kconfig
@@ -28,4 +28,14 @@ config SOC_IMX9
help
If you say yes here, you get support for the NXP i.MX9 family
+config IMX8M_BLK_CTRL
+ bool
+ default SOC_IMX8M && IMX_GPCV2_PM_DOMAINS
+ depends on PM_GENERIC_DOMAINS
+
+config IMX9_BLK_CTRL
+ bool
+ default SOC_IMX9 && IMX_GPCV2_PM_DOMAINS
+ depends on PM_GENERIC_DOMAINS
+
endmenu
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 7b4099ceafd6..a28c44a1f16a 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -5,7 +5,7 @@ endif
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
-obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
-obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
+obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8m-blk-ctrl.o
+obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8mp-blk-ctrl.o
obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
-obj-$(CONFIG_SOC_IMX9) += imx93-blk-ctrl.o
+obj-$(CONFIG_IMX9_BLK_CTRL) += imx93-blk-ctrl.o
--
2.30.2
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 3/5] soc: imx: imx8mp-blk-ctrl: add instance specific probe function
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
2022-12-16 20:08 ` [PATCH v3 2/5] soc: imx: add Kconfig symbols for blk-ctrl drivers Lucas Stach
@ 2022-12-16 20:08 ` Lucas Stach
2022-12-16 20:08 ` [PATCH v3 4/5] soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock Lucas Stach
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Lucas Stach @ 2022-12-16 20:08 UTC (permalink / raw)
To: Shawn Guo
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
Allow the specific blk-ctrl instance to define a function, which will
be called during probe to provide device specific extensions.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Lukas F. Hartmann <lukas@mntre.com>
---
drivers/soc/imx/imx8mp-blk-ctrl.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c
index 0e3b6ba22f94..b3d9f6e083ba 100644
--- a/drivers/soc/imx/imx8mp-blk-ctrl.c
+++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
@@ -60,6 +60,7 @@ struct imx8mp_blk_ctrl_domain {
struct imx8mp_blk_ctrl_data {
int max_reg;
+ int (*probe) (struct imx8mp_blk_ctrl *bc);
notifier_fn_t power_notifier_fn;
void (*power_off) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
void (*power_on) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
@@ -634,6 +635,12 @@ static int imx8mp_blk_ctrl_probe(struct platform_device *pdev)
goto cleanup_provider;
}
+ if (bc_data->probe) {
+ ret = bc_data->probe(bc);
+ if (ret)
+ goto cleanup_provider;
+ }
+
dev_set_drvdata(dev, bc);
return 0;
--
2.30.2
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 4/5] soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
2022-12-16 20:08 ` [PATCH v3 2/5] soc: imx: add Kconfig symbols for blk-ctrl drivers Lucas Stach
2022-12-16 20:08 ` [PATCH v3 3/5] soc: imx: imx8mp-blk-ctrl: add instance specific probe function Lucas Stach
@ 2022-12-16 20:08 ` Lucas Stach
2022-12-16 20:08 ` [PATCH v3 5/5] arm64: dts: imx8mp: add clock-cells to hsio-blk-ctrl Lucas Stach
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Lucas Stach @ 2022-12-16 20:08 UTC (permalink / raw)
To: Shawn Guo
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
Expose the high performance PLL as a regular Linux clock, so the
PCIe PHY can use it when there is no external refclock provided.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Lukas F. Hartmann <lukas@mntre.com>
---
v3:
- add missing static annotation
- add COMMON_CLK dependency
---
drivers/soc/imx/Kconfig | 1 +
drivers/soc/imx/imx8mp-blk-ctrl.c | 98 +++++++++++++++++++++++++++++++
2 files changed, 99 insertions(+)
diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
index 179bcc896ea2..a8742fc58f01 100644
--- a/drivers/soc/imx/Kconfig
+++ b/drivers/soc/imx/Kconfig
@@ -32,6 +32,7 @@ config IMX8M_BLK_CTRL
bool
default SOC_IMX8M && IMX_GPCV2_PM_DOMAINS
depends on PM_GENERIC_DOMAINS
+ depends on COMMON_CLK
config IMX9_BLK_CTRL
bool
diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c
index b3d9f6e083ba..0629f64ef4f1 100644
--- a/drivers/soc/imx/imx8mp-blk-ctrl.c
+++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
@@ -4,7 +4,9 @@
* Copyright 2022 Pengutronix, Lucas Stach <kernel@pengutronix.de>
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/device.h>
#include <linux/interconnect.h>
#include <linux/module.h>
@@ -21,6 +23,15 @@
#define USB_CLOCK_MODULE_EN BIT(1)
#define PCIE_PHY_APB_RST BIT(4)
#define PCIE_PHY_INIT_RST BIT(5)
+#define GPR_REG1 0x4
+#define PLL_LOCK BIT(13)
+#define GPR_REG2 0x8
+#define P_PLL_MASK GENMASK(5, 0)
+#define M_PLL_MASK GENMASK(15, 6)
+#define S_PLL_MASK GENMASK(18, 16)
+#define GPR_REG3 0xc
+#define PLL_CKE BIT(17)
+#define PLL_RST BIT(31)
struct imx8mp_blk_ctrl_domain;
@@ -74,6 +85,92 @@ to_imx8mp_blk_ctrl_domain(struct generic_pm_domain *genpd)
return container_of(genpd, struct imx8mp_blk_ctrl_domain, genpd);
}
+struct clk_hsio_pll {
+ struct clk_hw hw;
+ struct regmap *regmap;
+};
+
+static inline struct clk_hsio_pll *to_clk_hsio_pll(struct clk_hw *hw)
+{
+ return container_of(hw, struct clk_hsio_pll, hw);
+}
+
+static int clk_hsio_pll_prepare(struct clk_hw *hw)
+{
+ struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);
+ u32 val;
+
+ /* set the PLL configuration */
+ regmap_update_bits(clk->regmap, GPR_REG2,
+ P_PLL_MASK | M_PLL_MASK | S_PLL_MASK,
+ FIELD_PREP(P_PLL_MASK, 12) |
+ FIELD_PREP(M_PLL_MASK, 800) |
+ FIELD_PREP(S_PLL_MASK, 4));
+
+ /* de-assert PLL reset */
+ regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST);
+
+ /* enable PLL */
+ regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE);
+
+ return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val,
+ val & PLL_LOCK, 10, 100);
+}
+
+static void clk_hsio_pll_unprepare(struct clk_hw *hw)
+{
+ struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);
+
+ regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0);
+}
+
+static int clk_hsio_pll_is_prepared(struct clk_hw *hw)
+{
+ struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);
+
+ return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK);
+}
+
+static unsigned long clk_hsio_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return 100000000;
+}
+
+static const struct clk_ops clk_hsio_pll_ops = {
+ .prepare = clk_hsio_pll_prepare,
+ .unprepare = clk_hsio_pll_unprepare,
+ .is_prepared = clk_hsio_pll_is_prepared,
+ .recalc_rate = clk_hsio_pll_recalc_rate,
+};
+
+static int imx8mp_hsio_blk_ctrl_probe(struct imx8mp_blk_ctrl *bc)
+{
+ struct clk_hsio_pll *clk_hsio_pll;
+ struct clk_hw *hw;
+ struct clk_init_data init = {};
+ int ret;
+
+ clk_hsio_pll = devm_kzalloc(bc->dev, sizeof(*clk_hsio_pll), GFP_KERNEL);
+ if (!clk_hsio_pll)
+ return -ENOMEM;
+
+ init.name = "hsio_pll";
+ init.ops = &clk_hsio_pll_ops;
+ init.parent_names = (const char *[]){"osc_24m"};
+ init.num_parents = 1;
+
+ clk_hsio_pll->regmap = bc->regmap;
+ clk_hsio_pll->hw.init = &init;
+
+ hw = &clk_hsio_pll->hw;
+ ret = devm_clk_hw_register(bc->dev, hw);
+ if (ret)
+ return ret;
+
+ return devm_of_clk_add_hw_provider(bc->dev, of_clk_hw_simple_get, hw);
+}
+
static void imx8mp_hsio_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
struct imx8mp_blk_ctrl_domain *domain)
{
@@ -188,6 +285,7 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hsio_domain_data[] = {
static const struct imx8mp_blk_ctrl_data imx8mp_hsio_blk_ctl_dev_data = {
.max_reg = 0x24,
+ .probe = imx8mp_hsio_blk_ctrl_probe,
.power_on = imx8mp_hsio_blk_ctrl_power_on,
.power_off = imx8mp_hsio_blk_ctrl_power_off,
.power_notifier_fn = imx8mp_hsio_power_notifier,
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 5/5] arm64: dts: imx8mp: add clock-cells to hsio-blk-ctrl
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
` (2 preceding siblings ...)
2022-12-16 20:08 ` [PATCH v3 4/5] soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock Lucas Stach
@ 2022-12-16 20:08 ` Lucas Stach
2022-12-20 14:23 ` [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Krzysztof Kozlowski
2023-01-01 3:12 ` Shawn Guo
5 siblings, 0 replies; 7+ messages in thread
From: Lucas Stach @ 2022-12-16 20:08 UTC (permalink / raw)
To: Shawn Guo
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
The HSIO blk-ctrl exposes the high performance PLL as
a simple clock.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Lukas F. Hartmann <lukas@mntre.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index bb916a0948a8..f39a39b44718 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1158,6 +1158,7 @@ hsio_blk_ctrl: blk-ctrl@32f10000 {
<&noc IMX8MP_ICM_PCIE &noc IMX8MP_ICN_HSIO>;
interconnect-names = "noc-pcie", "usb1", "usb2", "pcie";
#power-domain-cells = <1>;
+ #clock-cells = <0>;
};
};
--
2.30.2
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^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
` (3 preceding siblings ...)
2022-12-16 20:08 ` [PATCH v3 5/5] arm64: dts: imx8mp: add clock-cells to hsio-blk-ctrl Lucas Stach
@ 2022-12-20 14:23 ` Krzysztof Kozlowski
2023-01-01 3:12 ` Shawn Guo
5 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-12-20 14:23 UTC (permalink / raw)
To: Lucas Stach, Shawn Guo
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
On 16/12/2022 21:08, Lucas Stach wrote:
> The HSIO blk-ctrl has a internal PLL, which can be used as a reference
> clock for the PCIe PHY. Add clock-cells to the binding to allow the
> driver to expose this PLL.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells
2022-12-16 20:08 [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Lucas Stach
` (4 preceding siblings ...)
2022-12-20 14:23 ` [PATCH v3 1/5] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells Krzysztof Kozlowski
@ 2023-01-01 3:12 ` Shawn Guo
5 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2023-01-01 3:12 UTC (permalink / raw)
To: Lucas Stach
Cc: Pengutronix Kernel Team, NXP Linux Team, Richard Zhu, devicetree,
linux-arm-kernel, patchwork-lst, Lukas F . Hartmann,
Marcel Ziswiler
On Fri, Dec 16, 2022 at 09:08:17PM +0100, Lucas Stach wrote:
> The HSIO blk-ctrl has a internal PLL, which can be used as a reference
> clock for the PCIe PHY. Add clock-cells to the binding to allow the
> driver to expose this PLL.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Applied all, thanks!
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^ permalink raw reply [flat|nested] 7+ messages in thread