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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id j2-20020a056808034200b003648b84a2b5sm2689170oie.33.2023.01.25.12.34.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Jan 2023 12:34:21 -0800 (PST) Received: (nullmailer pid 2860162 invoked by uid 1000); Wed, 25 Jan 2023 20:34:20 -0000 Date: Wed, 25 Jan 2023 14:34:20 -0600 From: Rob Herring To: bchihi@baylibre.com Cc: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com Subject: Re: [PATCH v11 2/6] dt-bindings/thermal/mediatek: Add LVTS thermal controllers dt-binding definition Message-ID: <20230125203420.GA2855708-robh@kernel.org> References: <20230124131717.128660-1-bchihi@baylibre.com> <20230124131717.128660-3-bchihi@baylibre.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230124131717.128660-3-bchihi@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230125_123422_504132_F5D32D19 X-CRM114-Status: GOOD ( 20.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 24, 2023 at 02:17:13PM +0100, bchihi@baylibre.com wrote: > From: Balsam CHIHI > dt-bindings: thermal: ... for the subject > Add LVTS thermal controllers dt-binding definition for mt8195. > > Signed-off-by: Balsam CHIHI > --- > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > 2 files changed, 126 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > new file mode 100644 > index 000000000000..12bfbdd8ff89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > @@ -0,0 +1,107 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > + > +maintainers: > + - Balsam CHIHI > + > +description: | > + LVTS is a thermal management architecture composed of three subsystems, > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > + a Digital controller (LVTS_CTRL). > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-lvts-ap > + - mediatek,mt8195-lvts-mcu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + description: LVTS reset for clearing temporary data on AP/MCU. > + > + nvmem-cells: > + minItems: 1 > + items: > + - description: Calibration eFuse data 1 for LVTS > + - description: Calibration eFuse data 2 for LVTS > + > + nvmem-cell-names: > + minItems: 1 > + items: > + - const: lvts-calib-data-1 > + - const: lvts-calib-data-2 > + > + "#thermal-sensor-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - resets > + - nvmem-cells > + - nvmem-cell-names > + - "#thermal-sensor-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + lvts_mcu: thermal-sensor@11278000 { > + compatible = "mediatek,mt8195-lvts-mcu"; > + reg = <0 0x11278000 0 0x1000>; > + interrupts = ; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + > + thermal_zones: thermal-zones { > + cpu0-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <250>; > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > + > + trips { > + cpu0_alert: trip-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu0_crit: trip-crit { > + temperature = <100000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + }; > + }; > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > new file mode 100644 > index 000000000000..428a95c18509 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ Okay with GPL 4? GPL-2.0-only Dual license please. Consistent with your .dts files. > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI > + */ > + > +#ifndef __MEDIATEK_LVTS_DT_H > +#define __MEDIATEK_LVTS_DT_H > + > +#define MT8195_MCU_BIG_CPU0 0 > +#define MT8195_MCU_BIG_CPU1 1 > +#define MT8195_MCU_BIG_CPU2 2 > +#define MT8195_MCU_BIG_CPU3 3 > +#define MT8195_MCU_LITTLE_CPU0 4 > +#define MT8195_MCU_LITTLE_CPU1 5 > +#define MT8195_MCU_LITTLE_CPU2 6 > +#define MT8195_MCU_LITTLE_CPU3 7 > + > +#endif /* __MEDIATEK_LVTS_DT_H */ > -- > 2.34.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel