From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C14B2C54E94 for ; Thu, 26 Jan 2023 14:43:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=Y+nQYcR3Ym6CMNTjBPAjrDqNHcbKWt3u0GLZGaASda0=; b=4PffBJIY8gvwKO 0C+hKIZC+UrmMnS/Daz8bxHw1Ixcf8CAjUVPIk9+vKUW0r1RlDsxqJuOcCLFvrH3lMSgf5S7FcK5C drXdiu/7NPJNwrh56IkiUeWueJAFkT+xl0uA59qNILk8X6y3iPijdzn94qX9QAY7scOY+CX6O/VNB bKo8FbVmZ5zZvd6ZsJGDV0IPKMKrJ7wxvmIz6a1pq0Lzp5KOU/JHZdP1xQtt8n9Q6eZvlI0HHqIBv o+HCAmZwJ4YxR6UvouFuVVh78o5n18WmJv8nnDquld527tq1AyJAwo1D6m/mnPRtbImviTfFPDYOh oANY5/EiiHIKatngr36w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pL3SU-00BFO6-0k; Thu, 26 Jan 2023 14:42:34 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pL3SQ-00BFN0-F3; Thu, 26 Jan 2023 14:42:31 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7665861852; Thu, 26 Jan 2023 14:42:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 96BDDC433D2; Thu, 26 Jan 2023 14:42:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1674744148; bh=CCnYelU7vTWlPZSDl5BT9muUMJjl8j5MAppunZabsV4=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=ehJKrCD8jcjfhoDgsR6ecGQVWtuWDx5JLIwvHsueNlXIxaIYuVjIx9Pv1DPonDJIi SEwF2sFyaI+no5tUS1i9CWP+akisKqLIYBwBtFGv0+AuiYrfpnyr30bCkLXoTrRYiu hsJJYi7r0t6ihexW55XaFpla7rPjYVvBZ+421W8fKfzXfB2Lys1c8hDZ7TQ3dfDaHi sjXRIFp7x8G339EFwAncZTmkwFEonMXS8WIeo/lIDLnUAYkOqeKoY8GDfxNasDQb8s GBrKXLK8JqMcpA676/E+eJTJsi72j2OTEIjowtO4ug5dU7vY0yfQA1o2Rnc+nGv7dE /xg3Eg1MvyDwg== Date: Thu, 26 Jan 2023 08:42:27 -0600 From: Bjorn Helgaas To: Rick Wertenbroek Cc: alberto.dassatti@heig-vd.ch, xxm@rock-chips.com, wenrui.li@rock-chips.com, rick.wertenbroek@heig-vd.ch, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , Jani Nikula , Rodrigo Vivi , Mikko Kovanen , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked Message-ID: <20230126144227.GA1271912@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230126135049.708524-5-rick.wertenbroek@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230126_064230_557573_43EB76E0 X-CRM114-Status: GOOD ( 11.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jan 26, 2023 at 02:50:44PM +0100, Rick Wertenbroek wrote: > The Rockchip PCIe controller did not wait until the PHY PLLs were locked. > This could cause hangs. Now the PHY PLLs status is checked through a side > channel bit with a poll and timeout. If the PHY PLLs cannot lock an error > is generated. This is documented in the TRM section 17.5.8.1 PCIe > Initalization Sequence. s/Initalization/Initialization/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel