From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Chen-Yu Tsai <wens@csie.org>,
Samuel Holland <samuel@sholland.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev
Subject: [PATCH] arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS
Date: Tue, 28 Feb 2023 11:41:12 +0000 [thread overview]
Message-ID: <20230228114112.3340715-1-andre.przywara@arm.com> (raw)
So far the OrangePi PC2 board was running at a fixed frequency, set by
U-Boot to 816 MHz, which is the best achievable frequency at the 1.1V
CPU voltage provided by the PMIC at reset.
We already describe the CPU voltage regulator in the DT, but were
missing the OPP table. Just include the default H5 OPP table, as used
by other boards. My OrangePi PC2 runs just fine with those values, and
now goes up to 1.15 GHz.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index b5c1ff19b4c41..ce3ae19e72dbd 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
--
2.25.1
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next reply other threads:[~2023-02-28 11:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-28 11:41 Andre Przywara [this message]
2023-02-28 21:08 ` [PATCH] arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS Jernej Škrabec
2023-03-14 20:37 ` Jernej Škrabec
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