linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Brad Larson <blarson@amd.com>
To: <krzysztof.kozlowski@linaro.org>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
	<andy.shevchenko@gmail.com>, <arnd@arndb.de>, <blarson@amd.com>,
	<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
	<brijeshkumar.singh@amd.com>, <broonie@kernel.org>,
	<catalin.marinas@arm.com>, <davidgow@google.com>,
	<devicetree@vger.kernel.org>, <fancer.lancer@gmail.com>,
	<gerg@linux-m68k.org>, <gsomlo@gmail.com>, <krzk@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <lee.jones@linaro.org>,
	<lee@kernel.org>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <p.yadav@ti.com>,
	<p.zabel@pengutronix.de>, <piotrs@cadence.com>,
	<rdunlap@infradead.org>, <robh+dt@kernel.org>,
	<samuel@sholland.org>, <skhan@linuxfoundation.org>,
	<suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>,
	<tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>,
	<vaishnav.a@ti.com>, <will@kernel.org>,
	<yamada.masahiro@socionext.com>
Subject: Re: [PATCH v10 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC
Date: Mon, 6 Mar 2023 18:11:03 -0800	[thread overview]
Message-ID: <20230307021103.25299-1-blarson@amd.com> (raw)
In-Reply-To: <ebbc1c7a-2a96-409c-0e92-ae0f57ae5335@linaro.org>

On 06/03/2023 8:28, Krzysztof Kozlowski wrote: 
> On 06/03/2023 05:07, Brad Larson wrote:
>> AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
>> explicitly controls byte-lane enables.
>> 
>> Signed-off-by: Brad Larson <blarson@amd.com>
>> ---
>> 
>> v10 changes:
>> - Move reset-names property definition next to existing resets prop
>> - Move allOf to the bottom and set resets/reset-names required only for pensando
>> - Fix reg maxItems for existing, must be 1
>> 
>> v9 changes:
>> - Add reset-names and resets properties
>> - Add if/then on property amd,pensando-elba-sd4hc to set reg property
>>   values for minItems and maxItems
>> 
>> ---
>>  .../devicetree/bindings/mmc/cdns,sdhci.yaml   | 33 ++++++++++++++++---
>>  1 file changed, 29 insertions(+), 4 deletions(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
>> index adacd0535c14..0c4d6d4b2b58 100644
>> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
>> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
>> @@ -9,19 +9,18 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
>>  maintainers:
>>    - Masahiro Yamada <yamada.masahiro@socionext.com>
>>  
>> -allOf:
>> -  - $ref: mmc-controller.yaml
>> -
>>  properties:
>>    compatible:
>>      items:
>>        - enum:
>> +          - amd,pensando-elba-sd4hc
>>            - microchip,mpfs-sd4hc
>>            - socionext,uniphier-sd4hc
>>        - const: cdns,sd4hc
>>  
>>    reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>>  
>>    interrupts:
>>      maxItems: 1
>> @@ -30,8 +29,13 @@ properties:
>>      maxItems: 1
>>  
>>    resets:
>> +    description: physical line number to hardware reset the mmc
>
> This part seems to be not needed anymore. Resets field was already added.

Yes, see below.

>
>>      maxItems: 1
>>  
>> +  reset-names:
>> +    items:
>> +      - const: hw
>
> Why did you add reset-names for one item? There is no v8 of this patch,
> so I cannot find previous discussion about it.

I found resets property was added recently when I rebased.

cb7f090171393 (Kunihiko Hayashi    2023-02-13 13:52:33 +0900  32)   resets:
cb7f090171393 (Kunihiko Hayashi    2023-02-13 13:52:33 +0900  33)     maxItems: 1

I've deleted reset-names and dropped description for resets.

>
>>    # PHY DLL input delays:
>>    # They are used to delay the data valid window, and align the window to
>>    # sampling clock. The delay starts from 5ns (for delay parameter equal to 0)
>> @@ -120,6 +124,27 @@ required:
>>    - interrupts
>>    - clocks
>>  
>> +allOf:
>> +  - $ref: mmc-controller.yaml
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: amd,pensando-elba-sd4hc
>> +    then:
>> +      properties:
>> +        reg:
>> +          minItems: 2
>
> Hm, we missed to mention it before, but what is the second reg for? It's
> not obvious from the binding so probably you need to describe it instead
> minItems:
>   items:
>     - description: foo
>     - description: bar
>

The second reg is byte lane enable for writes.  The following passed dtbs_check
after getting: hint: "minItems" is only needed if less than the "items" list length

    then:
      properties:
        reg:
          items:
            - description: Host controller registers
            - description: Elba byte-lane enable register for writes
      required:
        - resets
    else:
      properties:
        resets: false
        reg:
          maxItems: 1

>> +      required:
>> +        - reset-names
>> +        - resets
>> +    else:
>> +      properties:
>> +        reset-names: false
>> +        resets: false
>> +        reg:
>> +          maxItems: 1
>> +
>>  unevaluatedProperties: false

Regards,
Brad

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-03-07  2:12 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06  4:07 [PATCH v10 00/15] Support AMD Pensando Elba SoC Brad Larson
2023-03-06  4:07 ` [PATCH v10 01/15] dt-bindings: arm: add AMD Pensando boards Brad Larson
2023-03-06  4:07 ` [PATCH v10 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson
2023-03-06  8:28   ` Krzysztof Kozlowski
2023-03-07  2:11     ` Brad Larson [this message]
2023-03-06  4:07 ` [PATCH v10 03/15] dt-bindings: spi: cdns: Add compatible for " Brad Larson
2023-03-06  8:29   ` Krzysztof Kozlowski
2023-03-07  2:13     ` Brad Larson
2023-03-06  4:07 ` [PATCH v10 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller Brad Larson
2023-03-06  8:31   ` Krzysztof Kozlowski
2023-03-06 15:36   ` Serge Semin
2023-03-06  4:07 ` [PATCH v10 05/15] dt-bindings: soc: amd: amd,pensando-elbasr: Add AMD Pensando SoC System Controller Brad Larson
2023-03-06  8:35   ` Krzysztof Kozlowski
2023-03-06  8:36     ` Krzysztof Kozlowski
2023-03-07  2:18       ` Brad Larson
2023-03-09  8:46         ` Krzysztof Kozlowski
2023-03-11 23:32           ` Brad Larson
2023-03-07  2:16     ` Brad Larson
2023-03-06  4:07 ` [PATCH v10 06/15] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2023-03-06  4:07 ` [PATCH v10 07/15] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2023-03-06  4:07 ` [PATCH v10 08/15] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2023-03-06  4:07 ` [PATCH v10 09/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-03-06  4:07 ` [PATCH v10 10/15] spi: dw: Add support " Brad Larson
2023-03-06 16:00   ` Serge Semin
2023-03-06 19:59     ` Andy Shevchenko
2023-03-06 20:40       ` Serge Semin
2023-03-07  2:20     ` Brad Larson
2023-03-09 12:14       ` Serge Semin
2023-03-06  4:07 ` [PATCH v10 11/15] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson
2023-03-10 11:09   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 12/15] mmc: sdhci-cadence: Support device specific init during probe Brad Larson
2023-03-10 11:10   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson
2023-03-10 11:10   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 14/15] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson
2023-03-10 11:11   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 15/15] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson
2023-03-06  7:41   ` kernel test robot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230307021103.25299-1-blarson@amd.com \
    --to=blarson@amd.com \
    --cc=adrian.hunter@intel.com \
    --cc=alcooperx@gmail.com \
    --cc=andy.shevchenko@gmail.com \
    --cc=arnd@arndb.de \
    --cc=brendan.higgins@linux.dev \
    --cc=briannorris@chromium.org \
    --cc=brijeshkumar.singh@amd.com \
    --cc=broonie@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=davidgow@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=fancer.lancer@gmail.com \
    --cc=gerg@linux-m68k.org \
    --cc=gsomlo@gmail.com \
    --cc=krzk@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=lee.jones@linaro.org \
    --cc=lee@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=p.yadav@ti.com \
    --cc=p.zabel@pengutronix.de \
    --cc=piotrs@cadence.com \
    --cc=rdunlap@infradead.org \
    --cc=robh+dt@kernel.org \
    --cc=samuel@sholland.org \
    --cc=skhan@linuxfoundation.org \
    --cc=suravee.suthikulpanit@amd.com \
    --cc=thomas.lendacky@amd.com \
    --cc=tonyhuang.sunplus@gmail.com \
    --cc=ulf.hansson@linaro.org \
    --cc=vaishnav.a@ti.com \
    --cc=will@kernel.org \
    --cc=yamada.masahiro@socionext.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).