From: Ard Biesheuvel <ardb@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Ard Biesheuvel <ardb@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ryan Roberts <ryan.roberts@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Kees Cook <keescook@chromium.org>
Subject: [PATCH v3 52/60] arm64: mm: Add support for folding PUDs at runtime
Date: Tue, 7 Mar 2023 15:05:14 +0100 [thread overview]
Message-ID: <20230307140522.2311461-53-ardb@kernel.org> (raw)
In-Reply-To: <20230307140522.2311461-1-ardb@kernel.org>
In order to support LPA2 on 16k pages in a way that permits non-LPA2
systems to run the same kernel image, we have to be able to fall back to
at most 48 bits of virtual addressing.
Falling back to 48 bits would result in a level 0 with only 2 entries,
which is suboptimal in terms of TLB utilization. So instead, let's fall
back to 47 bits in that case. This means we need to be able to fold PUDs
dynamically, similar to how we fold P4Ds for 48 bit virtual addressing
on LPA2 with 4k pages.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/include/asm/pgalloc.h | 12 ++-
arch/arm64/include/asm/pgtable.h | 87 +++++++++++++++++---
arch/arm64/include/asm/tlb.h | 3 +-
arch/arm64/kernel/cpufeature.c | 2 +
arch/arm64/mm/mmu.c | 2 +-
arch/arm64/mm/pgd.c | 2 +
6 files changed, 94 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h
index cae8c648f4628709..aeba2cf15a253ee1 100644
--- a/arch/arm64/include/asm/pgalloc.h
+++ b/arch/arm64/include/asm/pgalloc.h
@@ -14,6 +14,7 @@
#include <asm/tlbflush.h>
#define __HAVE_ARCH_PGD_FREE
+#define __HAVE_ARCH_PUD_FREE
#include <asm-generic/pgalloc.h>
#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
@@ -43,7 +44,8 @@ static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)
static inline void __p4d_populate(p4d_t *p4dp, phys_addr_t pudp, p4dval_t prot)
{
- set_p4d(p4dp, __p4d(__phys_to_p4d_val(pudp) | prot));
+ if (pgtable_l4_enabled())
+ set_p4d(p4dp, __p4d(__phys_to_p4d_val(pudp) | prot));
}
static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4dp, pud_t *pudp)
@@ -53,6 +55,14 @@ static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4dp, pud_t *pudp)
p4dval |= (mm == &init_mm) ? P4D_TABLE_UXN : P4D_TABLE_PXN;
__p4d_populate(p4dp, __pa(pudp), p4dval);
}
+
+static inline void pud_free(struct mm_struct *mm, pud_t *pud)
+{
+ if (!pgtable_l4_enabled())
+ return;
+ BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
+ free_page((unsigned long)pud);
+}
#else
static inline void __p4d_populate(p4d_t *p4dp, phys_addr_t pudp, p4dval_t prot)
{
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index a286ecc447d33b24..02ba59a8ede7e0fd 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -751,12 +751,27 @@ static inline pmd_t *pud_pgtable(pud_t pud)
#if CONFIG_PGTABLE_LEVELS > 3
+static __always_inline bool pgtable_l4_enabled(void)
+{
+ if (CONFIG_PGTABLE_LEVELS > 4 || !IS_ENABLED(CONFIG_ARM64_LPA2))
+ return true;
+ if (!alternative_has_feature_likely(ARM64_ALWAYS_BOOT))
+ return vabits_actual == VA_BITS;
+ return alternative_has_feature_unlikely(ARM64_HAS_VA52);
+}
+
+static inline bool mm_pud_folded(const struct mm_struct *mm)
+{
+ return !pgtable_l4_enabled();
+}
+#define mm_pud_folded mm_pud_folded
+
#define pud_ERROR(e) \
pr_err("%s:%d: bad pud %016llx.\n", __FILE__, __LINE__, pud_val(e))
-#define p4d_none(p4d) (!p4d_val(p4d))
-#define p4d_bad(p4d) (!(p4d_val(p4d) & 2))
-#define p4d_present(p4d) (p4d_val(p4d))
+#define p4d_none(p4d) (pgtable_l4_enabled() && !p4d_val(p4d))
+#define p4d_bad(p4d) (pgtable_l4_enabled() && !(p4d_val(p4d) & 2))
+#define p4d_present(p4d) (!p4d_none(p4d))
static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
{
@@ -772,7 +787,8 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
static inline void p4d_clear(p4d_t *p4dp)
{
- set_p4d(p4dp, __p4d(0));
+ if (pgtable_l4_enabled())
+ set_p4d(p4dp, __p4d(0));
}
static inline phys_addr_t p4d_page_paddr(p4d_t p4d)
@@ -780,25 +796,74 @@ static inline phys_addr_t p4d_page_paddr(p4d_t p4d)
return __p4d_to_phys(p4d);
}
+#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
+
+static inline pud_t *p4d_to_folded_pud(p4d_t *p4dp, unsigned long addr)
+{
+ return (pud_t *)PTR_ALIGN_DOWN(p4dp, PAGE_SIZE) + pud_index(addr);
+}
+
static inline pud_t *p4d_pgtable(p4d_t p4d)
{
return (pud_t *)__va(p4d_page_paddr(p4d));
}
-/* Find an entry in the first-level page table. */
-#define pud_offset_phys(dir, addr) (p4d_page_paddr(READ_ONCE(*(dir))) + pud_index(addr) * sizeof(pud_t))
+static inline phys_addr_t pud_offset_phys(p4d_t *p4dp, unsigned long addr)
+{
+ BUG_ON(!pgtable_l4_enabled());
-#define pud_set_fixmap(addr) ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
-#define pud_set_fixmap_offset(p4d, addr) pud_set_fixmap(pud_offset_phys(p4d, addr))
-#define pud_clear_fixmap() clear_fixmap(FIX_PUD)
+ return p4d_page_paddr(READ_ONCE(*p4dp)) + pud_index(addr) * sizeof(pud_t);
+}
-#define p4d_page(p4d) pfn_to_page(__phys_to_pfn(__p4d_to_phys(p4d)))
+static inline
+pud_t *pud_offset_lockless(p4d_t *p4dp, p4d_t p4d, unsigned long addr)
+{
+ if (!pgtable_l4_enabled())
+ return p4d_to_folded_pud(p4dp, addr);
+ return (pud_t *)__va(p4d_page_paddr(p4d)) + pud_index(addr);
+}
+#define pud_offset_lockless pud_offset_lockless
+
+static inline pud_t *pud_offset(p4d_t *p4dp, unsigned long addr)
+{
+ return pud_offset_lockless(p4dp, READ_ONCE(*p4dp), addr);
+}
+#define pud_offset pud_offset
+
+static inline pud_t *pud_set_fixmap(unsigned long addr)
+{
+ if (!pgtable_l4_enabled())
+ return NULL;
+ return (pud_t *)set_fixmap_offset(FIX_PUD, addr);
+}
+
+static inline pud_t *pud_set_fixmap_offset(p4d_t *p4dp, unsigned long addr)
+{
+ if (!pgtable_l4_enabled())
+ return p4d_to_folded_pud(p4dp, addr);
+ return pud_set_fixmap(pud_offset_phys(p4dp, addr));
+}
+
+static inline void pud_clear_fixmap(void)
+{
+ if (pgtable_l4_enabled())
+ clear_fixmap(FIX_PUD);
+}
/* use ONLY for statically allocated translation tables */
-#define pud_offset_kimg(dir,addr) ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
+static inline pud_t *pud_offset_kimg(p4d_t *p4dp, u64 addr)
+{
+ if (!pgtable_l4_enabled())
+ return p4d_to_folded_pud(p4dp, addr);
+ return (pud_t *)__phys_to_kimg(pud_offset_phys(p4dp, addr));
+}
+
+#define p4d_page(p4d) pfn_to_page(__phys_to_pfn(__p4d_to_phys(p4d)))
#else
+static inline bool pgtable_l4_enabled(void) { return false; }
+
#define p4d_page_paddr(p4d) ({ BUILD_BUG(); 0;})
/* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index c995d1f4594f6692..a23d33b6b56b8c35 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -94,7 +94,8 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
unsigned long addr)
{
- tlb_remove_table(tlb, virt_to_page(pudp));
+ if (pgtable_l4_enabled())
+ tlb_remove_table(tlb, virt_to_page(pudp));
}
#endif
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index b0fee11886e54ca2..62f6d397f27b07c0 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1731,6 +1731,8 @@ kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
if (levels == 5 && !pgtable_l5_enabled())
levels = 4;
+ else if (levels == 4 && !pgtable_l4_enabled())
+ levels = 3;
if (__this_cpu_read(this_cpu_vector) == vectors) {
const char *v = arm64_get_bp_hardening_vector(EL1_VECTOR_KPTI);
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 77cd163375124c6a..955c7c3341fbc9c2 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -1043,7 +1043,7 @@ static void free_empty_pud_table(p4d_t *p4dp, unsigned long addr,
free_empty_pmd_table(pudp, addr, next, floor, ceiling);
} while (addr = next, addr < end);
- if (CONFIG_PGTABLE_LEVELS <= 3)
+ if (!pgtable_l4_enabled())
return;
if (!pgtable_range_aligned(start, end, floor, ceiling, P4D_MASK))
diff --git a/arch/arm64/mm/pgd.c b/arch/arm64/mm/pgd.c
index 3c4f8a279d2bc76a..0c501cabc23846c4 100644
--- a/arch/arm64/mm/pgd.c
+++ b/arch/arm64/mm/pgd.c
@@ -21,6 +21,8 @@ static bool pgdir_is_page_size(void)
{
if (PGD_SIZE == PAGE_SIZE)
return true;
+ if (CONFIG_PGTABLE_LEVELS == 4)
+ return !pgtable_l4_enabled();
if (CONFIG_PGTABLE_LEVELS == 5)
return !pgtable_l5_enabled();
return false;
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-03-07 14:53 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-07 14:04 [PATCH v3 00/60] arm64: Add support for LPA2 at stage1 and WXN Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 01/60] arm64: kernel: Disable latent_entropy GCC plugin in early C runtime Ard Biesheuvel
2023-04-28 10:37 ` Mark Rutland
2023-04-28 10:54 ` Ard Biesheuvel
2023-04-28 11:48 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 02/60] arm64: mm: Take potential load offset into account when KASLR is off Ard Biesheuvel
2023-04-28 10:41 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 03/60] arm64: mm: get rid of kimage_vaddr global variable Ard Biesheuvel
2023-04-28 10:42 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 04/60] arm64: mm: Move PCI I/O emulation region above the vmemmap region Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 05/60] arm64: mm: Move fixmap region above " Ard Biesheuvel
2023-04-28 11:00 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 06/60] arm64: ptdump: Allow VMALLOC_END to be defined at boot Ard Biesheuvel
2023-03-07 16:58 ` Ryan Roberts
2023-03-07 17:01 ` Ard Biesheuvel
2023-04-28 11:25 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 07/60] arm64: ptdump: Discover start of vmemmap region at runtime Ard Biesheuvel
2023-03-07 16:36 ` Ryan Roberts
2023-04-28 11:27 ` Mark Rutland
2023-03-07 14:04 ` [PATCH v3 08/60] arm64: vmemmap: Avoid base2 order of struct page size to dimension region Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 09/60] arm64: mm: Reclaim unused vmemmap region for vmalloc use Ard Biesheuvel
2023-03-07 16:42 ` Ryan Roberts
2023-03-07 16:58 ` Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 10/60] arm64: kaslr: Adjust randomization range dynamically Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 11/60] arm64: kaslr: drop special case for ThunderX in kaslr_requires_kpti() Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 12/60] arm64: Turn kaslr_feature_override into a generic SW feature override Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 13/60] arm64: kvm: honour 'nokaslr' command line option for the HYP VA space Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 14/60] arm64: kernel: Manage absolute relocations in code built under pi/ Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 15/60] arm64: kernel: Don't rely on objcopy to make code under pi/ __init Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 16/60] arm64: head: move relocation handling to C code Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 17/60] arm64: idreg-override: Omit non-NULL checks for override pointer Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 18/60] arm64: idreg-override: Prepare for place relative reloc patching Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 19/60] arm64: idreg-override: Avoid parameq() and parameqn() Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 20/60] arm64: idreg-override: avoid strlen() to check for empty strings Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 21/60] arm64: idreg-override: Avoid sprintf() for simple string concatenation Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 22/60] arm64: idreg-override: Avoid kstrtou64() to parse a single hex digit Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 23/60] arm64: idreg-override: Move to early mini C runtime Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 24/60] arm64: kernel: Remove early fdt remap code Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 25/60] arm64: head: Clear BSS and the kernel page tables in one go Ard Biesheuvel
2023-04-17 14:00 ` Ryan Roberts
2023-04-17 14:02 ` Ard Biesheuvel
2023-04-17 14:09 ` Ryan Roberts
2023-03-07 14:04 ` [PATCH v3 26/60] arm64: Move feature overrides into the BSS section Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 27/60] arm64: head: Run feature override detection before mapping the kernel Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 28/60] arm64: head: move dynamic shadow call stack patching into early C runtime Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 29/60] arm64: kaslr: Use feature override instead of parsing the cmdline again Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 30/60] arm64: idreg-override: Create a pseudo feature for rodata=off Ard Biesheuvel
2023-04-17 14:28 ` Ryan Roberts
2023-04-17 14:30 ` Ard Biesheuvel
2023-04-17 14:33 ` Ryan Roberts
2023-03-07 14:04 ` [PATCH v3 31/60] arm64: Add helpers to probe local CPU for PAC/BTI/E0PD support Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 32/60] arm64: head: allocate more pages for the kernel mapping Ard Biesheuvel
2023-04-17 15:48 ` Ryan Roberts
2023-04-17 16:11 ` Ard Biesheuvel
2023-04-17 16:18 ` Ryan Roberts
2023-03-07 14:04 ` [PATCH v3 33/60] arm64: head: move memstart_offset_seed handling to C code Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 34/60] arm64: head: Move early kernel mapping routines into " Ard Biesheuvel
2023-04-18 9:31 ` Ryan Roberts
2023-04-18 10:06 ` Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 35/60] arm64: mm: Use 48-bit virtual addressing for the permanent ID map Ard Biesheuvel
2023-04-18 10:22 ` Ryan Roberts
2023-03-07 14:04 ` [PATCH v3 36/60] arm64: pgtable: Decouple PGDIR size macros from PGD/PUD/PMD levels Ard Biesheuvel
2023-03-07 14:04 ` [PATCH v3 37/60] arm64: kernel: Create initial ID map from C code Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 38/60] arm64: mm: avoid fixmap for early swapper_pg_dir updates Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 39/60] arm64: mm: omit redundant remap of kernel image Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 40/60] arm64: Revert "mm: provide idmap pointer to cpu_replace_ttbr1()" Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 41/60] arm64/mm: Add FEAT_LPA2 specific TCR_EL1.DS field Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 42/60] arm64/mm: Add FEAT_LPA2 specific ID_AA64MMFR0.TGRAN[2] Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 43/60] arm64: mm: Handle LVA support as a CPU feature Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 44/60] arm64: mm: Add feature override support for LVA Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 45/60] arm64: mm: Wire up TCR.DS bit to PTE shareability fields Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 46/60] arm64: mm: Add LPA2 support to phys<->pte conversion routines Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 47/60] arm64: mm: Add definitions to support 5 levels of paging Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 48/60] arm64: mm: add LPA2 and 5 level paging support to G-to-nG conversion Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 49/60] arm64: Enable LPA2 at boot if supported by the system Ard Biesheuvel
2023-04-18 13:50 ` Ryan Roberts
2023-03-07 14:05 ` [PATCH v3 50/60] arm64: mm: Add 5 level paging support to fixmap and swapper handling Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 51/60] arm64: kasan: Reduce minimum shadow alignment and enable 5 level paging Ard Biesheuvel
2023-03-07 14:05 ` Ard Biesheuvel [this message]
2023-03-07 14:05 ` [PATCH v3 53/60] arm64: ptdump: Disregard unaddressable VA space Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 54/60] arm64: ptdump: Deal with translation levels folded at runtime Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 55/60] arm64: kvm: avoid CONFIG_PGTABLE_LEVELS for runtime levels Ard Biesheuvel
2023-04-18 14:29 ` Ryan Roberts
2023-03-07 14:05 ` [PATCH v3 56/60] arm64: kvm: Limit HYP VA and host S2 range to 48 bits when LPA2 is in effect Ard Biesheuvel
2023-04-18 14:33 ` Ryan Roberts
2023-03-07 14:05 ` [PATCH v3 57/60] arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 58/60] arm64: defconfig: Enable LPA2 support Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 59/60] mm: add arch hook to validate mmap() prot flags Ard Biesheuvel
2023-03-07 14:05 ` [PATCH v3 60/60] arm64: mm: add support for WXN memory translation attribute Ard Biesheuvel
2023-03-07 16:28 ` [PATCH v3 00/60] arm64: Add support for LPA2 at stage1 and WXN Ryan Roberts
2023-03-08 8:31 ` Ard Biesheuvel
2023-04-18 15:01 ` Ryan Roberts
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230307140522.2311461-53-ardb@kernel.org \
--to=ardb@kernel.org \
--cc=anshuman.khandual@arm.com \
--cc=catalin.marinas@arm.com \
--cc=keescook@chromium.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=ryan.roberts@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).