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From: Harini Katakam <harini.katakam@amd.com>
To: <vkoul@kernel.org>, <romain.perier@gmail.com>,
	<allen.lkml@gmail.com>, <yukuai3@huawei.com>
Cc: <dmaengine@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <harinikatakamlinux@gmail.com>,
	<michal.simek@amd.com>, <harini.katakam@amd.com>,
	<radhey.shyam.pandey@amd.com>
Subject: [PATCH] dmaengine: zynqmp_dma: Sync DMA and coherent masks
Date: Thu, 16 Mar 2023 15:03:18 +0530	[thread overview]
Message-ID: <20230316093318.6722-1-harini.katakam@amd.com> (raw)

Align ZDMA DMA as well as coherent memory masks to 44 bit. This is
required when using >32 bit memory regions.

Signed-off-by: Harini Katakam <harini.katakam@amd.com>
---
 drivers/dma/xilinx/zynqmp_dma.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index 3f4ee3954384..34d7d20ffc09 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c
@@ -1051,7 +1051,11 @@ static int zynqmp_dma_probe(struct platform_device *pdev)
 	zdev->dev = &pdev->dev;
 	INIT_LIST_HEAD(&zdev->common.channels);
 
-	dma_set_mask(&pdev->dev, DMA_BIT_MASK(44));
+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44));
+	if (ret) {
+		dev_err(&pdev->dev, "DMA not available for address range\n");
+		return ret;
+	}
 	dma_cap_set(DMA_MEMCPY, zdev->common.cap_mask);
 
 	p = &zdev->common;
-- 
2.17.1


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             reply	other threads:[~2023-03-16  9:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-16  9:33 Harini Katakam [this message]
2023-03-21 14:45 ` [PATCH] dmaengine: zynqmp_dma: Sync DMA and coherent masks Michal Simek
2023-03-21 15:04   ` Katakam, Harini
2023-03-21 15:15     ` Michal Simek
2023-03-31 12:24 ` Vinod Koul

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