From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 632B9C74A5B for ; Fri, 17 Mar 2023 18:31:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dy+AZqcuAFTgqPlG/7I5fKNl41BhryM9MhpU9lpzQ84=; b=nv6Oor7RXXjIcW PUDlCEz3FY7HjvD4WmQ1arcp+w+p+H5sNaalLZEPGhMIPvCGKJhRvUlN4/hlEc6e2itLZPPzx779L HH/I08aGb/+27I1dmIJcLBbUz0r/DXRQKbvV7WlJqWNhtX0tkED6gyjpDf2lp6LZjL3wTuf3zMxwO 7z9h+PoN/fL1J6H49flpjs8uPPFmhoAhiGOxShbpiBkNBBNUCNd1d8Up78Rb0WOv3Eauj87yD/S9b FChT0ZgM/iBdM/io+In2KKywTEq6Bdd+oPXQ2EHhiUv0ujYzXEgg+sgiE/KFz/8JVlFYk0HurLHCA ee+24gffFxqcnfhBVYKQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pdEqh-0032Dw-1B; Fri, 17 Mar 2023 18:30:43 +0000 Received: from mail-io1-f48.google.com ([209.85.166.48]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pdEqe-0032DT-2X for linux-arm-kernel@lists.infradead.org; Fri, 17 Mar 2023 18:30:42 +0000 Received: by mail-io1-f48.google.com with SMTP id o12so2688101iow.6 for ; Fri, 17 Mar 2023 11:30:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679077840; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=sgkvJWHBERZyI9ZrvVnjcfVqSbigpZwA/hgWkyiT5z8=; b=wmoQADUotMVxKBdepxHSzx306hjj7knJcppyImPxxZ9G2MLIZ5LnoMz0nM9FuSIJNj ffqSZvpcc5dgfKCTCY/ftIvt6tMwy667CkSyjZKZ2QT+j49NCJG/Lnh8/ilXc/QOUOXp ZTkItiYmx370sVx2OmRr1IIi1VYG204hiVOyEbXDlEVyLusCZk4hC4Gce7WJ1Of7kVTh UTI+Cmir/ymQH5F+rk7ySHPdCBr04IuGSJIjQTsfcBHWud9yK098Rs8wTzW9mNd2+ECP fEvGgZulWr0+ZL/Om/89QM0RALZCnxVltJ5f4LCiXsBIu8wz7txOgMSaxb97ik/lFKB5 Bdsg== X-Gm-Message-State: AO0yUKXrw3y0pcgS/dftsAwktAcqIji2C3crxniYUdb09q11TP5ZjUgJ jlgzPfFt+8x8PjzYQQEMBQ== X-Google-Smtp-Source: AK7set888W8VrYdXLwryZbq2QFnCkjzeBscyk2PT/WSfT3V/hKTItdj690f1fK1WTP+4BIuCO0yLnw== X-Received: by 2002:a5e:a90f:0:b0:752:e9a2:1c5b with SMTP id c15-20020a5ea90f000000b00752e9a21c5bmr260158iod.14.1679077839913; Fri, 17 Mar 2023 11:30:39 -0700 (PDT) Received: from robh_at_kernel.org ([64.188.179.249]) by smtp.gmail.com with ESMTPSA id 6-20020a056e020ca600b00322f16e8906sm796106ilg.29.2023.03.17.11.30.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 11:30:39 -0700 (PDT) Received: (nullmailer pid 2585626 invoked by uid 1000); Fri, 17 Mar 2023 18:30:37 -0000 Date: Fri, 17 Mar 2023 13:30:37 -0500 From: Rob Herring To: Elad Nachman Cc: thomas.petazzoni@bootlin.com, bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 4/8] dt-bindings: PCI: dwc: Add dma-ranges, region mask Message-ID: <20230317183037.GB2445959-robh@kernel.org> References: <20230313124016.17102-1-enachman@marvell.com> <20230313124016.17102-5-enachman@marvell.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230313124016.17102-5-enachman@marvell.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230317_113040_826256_A2026D62 X-CRM114-Status: GOOD ( 22.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 13, 2023 at 02:40:12PM +0200, Elad Nachman wrote: > From: Elad Nachman > > Add properties to support configurable DMA mask bits and region mask bits: > > 1. configurable dma-ranges is needed for Marvell AC5/AC5X SOCs which > have their physical DDR memory start at address 0x2_0000_0000. > > 2. Configurable region mask bits is needed for the Marvell Armada > 7020/7040/8040 SOCs when the DT file places the PCIe window above the 4GB region. > The Synopsis Designware PCIe IP in these SOCs is too old to specify the > highest memory location supported by the PCIe, but practically supports > such locations. Allow these locations to be specified in the DT file. > > Signed-off-by: Elad Nachman > --- > v4: > 1) Fix commit message and its formatting > > 2) Replace num-dmamask with dma-ranges > > .../devicetree/bindings/pci/snps,dw-pcie-common.yaml | 5 +++++ > Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 6 ++++++ > 2 files changed, 11 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml > index d87e13496834..3cb9af1aefeb 100644 > --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml > +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml > @@ -261,6 +261,11 @@ properties: > > dma-coherent: true > > + num-regionmask: > + description: | > + number of region limit mask bits to use, if different than default 32 > + maximum: 64 This should be implied from the compatible string. > + > additionalProperties: true > > ... > diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml > index 1a83f0f65f19..ed7ae2a14804 100644 > --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml > @@ -197,6 +197,12 @@ properties: > - contains: > const: msi > > + dma-ranges: > + description: > + Defines the DMA mask for devices which due to non-standard HW address > + assignment have their RAM starting address above the lower 32-bit region. > + Since this is a mask, only the size attribute of the dma-ranges is used. > + No need for this, it is already defined in pci-bus.yaml. The description is wrong here anyways. The purpose is to translate inbound PCI addresses to parent bus addresses (and eventually CPU addresses). Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel